參數(shù)資料
型號: MB96F348RSBPMC-GSE2
廠商: Fujitsu Semiconductor America Inc
文件頁數(shù): 79/118頁
文件大?。?/td> 0K
描述: IC MCU 544KB FLASH/ROM 100LQFP
標(biāo)準(zhǔn)包裝: 1
系列: F²MC MB96340
核心處理器: F²MC-16FX
芯體尺寸: 16-位
速度: 56MHz
連通性: CAN,EBI/EMI,I²C,LIN,SCI,UART/USART
外圍設(shè)備: DMA,LVD,LVR,POR,PWM,WDT
輸入/輸出數(shù): 82
程序存儲(chǔ)器容量: 544KB(544K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 24K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 24x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 100-LQFP
包裝: 托盤
配用: 865-1100-ND - KIT BUNDLE 100PMC KIT/SOFTWARE
其它名稱: 865-1086
Specication
MB96340
FME/EMDC- 2007-9-12
MB96300_DS_handling.fm
51
PRELIMINARY
s HANDLING DEVICES
Special care is required for the following when handling the device:
Latch-up prevention
Treatment of unused pins
External clock
Precautions for when not using a sub clock signal
Notes on PLL clock mode operation
Power supply pins (VCC/VSS)
Crystal Oscillator Circuit
Turn on Sequence of Power Supply to A/D Converter and Analog Inputs
Connection of Unused Pins of A/D Converter
Notes on Energization
Stabilization of power supply voltage
1.
Preventing latch-up
CMOS IC chips may suffer latch-up under the following conditions:
A voltage higher than VCC or lower than VSS is applied to an input or output pin.
A voltage higher than the rated voltage is applied between VCC and VSS.
The AVCC power supply is applied before the VCC voltage.
Latch-up may increase the power supply current drastically, causing thermal damage to the device.
For the same reason, also be careful not to let the analog power-supply voltage (AVCC, AVRH) exceed the
digital power-supply voltage.
2.
Treatment of unused pins
Unused input pins may be left open when the input is disabled (corresponding bit of Port Input Enable register
PIER = 0).
Leaving unused input pins open when the input is enabled may result in misbehavior and possible permanent
damage of the device. Therefore they must be pulled up or pulled down through resistors. To prevent latch-
up, those resistors should be more than 2 k
.
Unused bidirectional pins can be set either to the output state and be then left open, or to the input state with
either input disabled or external pull-up/pull-down resistor as described above.
3.
External clock usage
To use external clock, drive the X0 pin and leave X1 pin open.
4.
Precautions for when not using a sub clock signal
If you do not connect pins X0A and X1A to an oscillator, use a pull-down resistor on the X0A pin, and leave
the X1A pin open.
5.
Notes on PLL clock mode operation
If the PLL clock mode is selected and no external oscillator is operating or no external clock is supplied, the
microcontroller attempts to work with the freely oscillating PLL. Performance of this operation, however,
cannot be guaranteed.
6.
Power supply pins (VCC/VSS)
Ensure that all VCC-level power supply pins are at the same potential. In addition, ensure the same for all
VSS-level power supply pins. If there are more than one VCC or VSS systems, the device may operate
incorrectly even within the guaranteed operating range.
Connect VCC and VSS to the device from the power supply with lowest possible impedance.
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