參數資料
型號： MB91F467TAPMC-GSE2
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-144
文件頁數： 53/140頁
文件大?。?/td> 4819K
代理商： MB91F467TAPMC-GSE2
MB91460T Series
2
DS705-00001-2v1-E
(Continued)
Harvard architecture enabling program access and data access to be performed simultaneously
Instructions compatible with the FR family
2.
Internal peripheral resources
General-purpose ports : Maximum 109 ports
DMAC (DMA Controller)
Maximum of 5 channels able to operate simultaneously
2 transfer sources (internal peripheral/software)
Activation source can be selected using software
Addressing mode specifies full 32-bit addresses (increment/decrement/fixed)
Transfer mode (demand transfer/burst transfer/step transfer/block transfer)
Transfer data size selectable from 8/16/32-bit
Multi-byte transfer enabled (by software)
DMAC descriptor in I/O areas (200H to 240H, 1000H to 1024H)
A/D converter (successive approximation type)
10-bit resolution: 32 channels *3
Conversion time: minimum 1
μs
External interrupt inputs : 12 channels *3
8 channels shared with A/D converter AN8-15
Bit search module (for REALOS)
Function to search from the MSB (most significant bit) for the position of the first “0”, “1”, or changed bit in a word
LIN-USART (full duplex double buffer): 11 channels *3
Clock synchronous/asynchronous selectable
Sync-break detection
Internal dedicated baud rate generator
I2C bus interface (supports 400 kbps): 4 channels *3
Master/slave transmission and reception
Arbitration function, clock synchronization function
CAN controller (C-CAN): Maximum of 2 channels
Maximum transfer speed: 1 Mbps
32 transmission/reception message buffers
Sound generator : 1 channel
Tone frequency : PWM frequency divide-by-two (reload value
+ 1)
Monitor external voltage
Generate an interrupt in case of voltage lower/higher than the defined thresholds (reference voltage)
16-bit PPG timer : 14 channels *3
16-bit PFM timer : 1 channel *3
16-bit reload timer: 8 channels
16-bit free-run timer: 8 channels (1 channel each for ICU and OCU) *3
Input capture: 8 channels (operates in conjunction with the free-run timer)
Output compare: 8 channels (operates in conjunction with the free-run timer)
Up/Down counter: 2 channels (4*8-bit or 2*16-bit) *3
Watchdog timer
Note: *1 This device is planned.
Note: *2 FR, the abbreviation of FUJITSU RISC controller, is a line of products of Fujitsu Semiconductor Limited.
Note: *3 The maximum channel count is given; the real number depends on port multiplexing.
(Continued)
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