參數(shù)資料
型號(hào): MB91F366GBPMT
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP120
封裝: PLASTIC, LQFP-120
文件頁(yè)數(shù): 197/239頁(yè)
文件大?。?/td> 3093K
代理商: MB91F366GBPMT
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MB91360G Series
60
5.
Crystal Oscillator Circuit
Noise in the vicinity of the X0 and X1 pins can be a cause of device malfunction. Design the circuit board so that
X0, X1, the crystal oscillator (or ceramic oscillator) , and the bypass capacitor to ground are located as close to
the device as possible.
A printed circuit board design that surrounds the X0 and X1 pins with ground provides for stable operation and
is strongly recommended.
6.
Using an External Clock
To use an external clock, drive X0 pin only and leave X1 pin open.
Below is a diagram of how to use external clock.
7.
Mode Pins
Connect the mode pins (MD0 to MD2) directly to VDD or VSS.
To prevent the device unintentionally entering test mode due to noise, lay out the printed circuit board so as to
minimize the distance from the mode pins to VDD or VSS and to provide a low-impedance connection.
8.
Turning the Power Supply on
Immediately after power on always execute INIT at the INITX pin (start with a low level at the INITX pin) . Hold
this low level at the INITX pin long enough so that after release of the low level at INITX and the passing of the
built in waiting time stable oscillation of the oscillation circuit is achieved. INITX must be pulled low for at least
8 cycles of the 4 MHz oscillation clock.
The analogue supply voltage (AVCC) must not be turned on before the digital supply voltage. If the external bus
interface is supplied with 3.3 V this voltage also must not be turned on before the 5 V digital voltage has been
switched on.
9.
A State in Turning Power on
As long as the minimum operating voltage has not been reached during power-on the output pin levels are not
guaranteed.
10. Note on During Operation of PLL Clock Mode
If the PLL clock mode is selected, the microcontroller attempts to be working with the self-frequency of the self-
oscillating circuit within the PLL even when there is no external oscillator or external clock input is stopped.
Performance of this operation, however, cannot be guaranteed.
11. The Function of the Watchdog Timer
The watchdog timer in this model has the functions watching that the program performs the delay of reset within
a fixed period and resetting the CPU when the delay of reset is not performed because of the program malfunction.
MB91360G Series
X0
X1
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