參數(shù)資料
型號： MB91487PMC-GE1
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, MROM, 80 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 64/96頁
文件大?。?/td> 2461K
代理商： MB91487PMC-GE1
MB91470/480 Series
DS07–16901–9E
67
5.
AC Characteristics
(1) Clock Timing
(VCC
= 4.0 V to 5.5 V, VSS = AVSS10 = AVSS12 = 0.0 V)
*1 : The values assume a gear cycle of 1/16.
*2 : When the PLL is used, the PLL multiplication rate varies depending on the frequency of the clock input
to the X0 and X1 pins. Set the PLL multiplication rate so that the PLL output clock frequency is in the
range between 40 MHz and 80 MHz.
Conditions for measuring the clock timing ratings
Parameter
Sym-
bol
Pin
Name
Condition
Value
Unit
Remarks
Min
Typ
Max
Clock frequency
fC
X0
X1
10*2
20
MHz
When using the
PLL within the self-
oscillating range,
set the multiplier
so that the internal
clock does not
exceed the internal
operating clock
frequency.
Clock cycle time
tC
X0
X1
100
50*2
ns
Internal operating
clock frequency
fCPB
When 20 MHz is
input as the X0
clock frequency and
the oscillator circuit
PLL system is set to
× 4 multiplication
5*1
80
MHz CPU
fCPP
5*1
40
MHz Peripheral
fCPT
5*1
40
MHz External bus
Internal operating
clock cycle time
tCPB
12.5
200
ns
CPU
tCPP
25
200
ns
Peripheral
tCPT
25
200
ns
External bus
PLL Multiplication Rate
1
2
345678
PLL output clock frequency
when X0
= 10 MHz
(Setting not allowed)
40 MHz
50 MHz
60 MHz
70 MHz
80 MHz
PLL output clock frequency
when X0
= 20 MHz
(Setting
not
allowed)
40 MHz
60 MHz
80 MHz
(Setting not allowed)
0.8 VCC
tC
C
= 50 pF
Output pin
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