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參數(shù)資料
| 型號： | MB90F867ESPMC |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 2/72頁 |
| 文件大小： | 2203K |
| 代理商： | MB90F867ESPMC |
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MB90860E Series
10
DS07-13748-5E
(Continued)
Pin No.
Pin name
I/O
Circuit
type*3
Function
QFP100*1 LQFP100*2
97
P34
G
General-purpose I/O pin. It is possible to select whether or not
a pull-up resistance is used by configuring a register. This
function is enabled either in single-chip mode or when the hold
function is disabled.
HRQ
Hold request input pin. This function is enabled when both the
external bus and the hold function are enabled.
OUT4
Waveform output pin for output compare 4.
10
8
P35
G
General-purpose I/O pin. It is possible to select whether or not
a pull-up resistance is used by configuring a register. This
function is enabled either in single-chip mode or when the hold
function is disabled.
HAK
Hold acknowledge output pin. This function is enabled when
both the external bus and the hold function are enabled.
OUT5
Waveform output pin for output compare 5.
11
9
P36
G
General-purpose I/O pin. It is possible to select whether or not
a pull-up resistance is used by configuring a register. This
function is enabled either in single-chip mode or when the
external ready function is disabled.
RDY
External ready input pin. This function is enabled when both the
external bus and the external ready function are enabled.
OUT6
Waveform output pin for output compare 6.
12
10
P37
G
General-purpose I/O pin. It is possible to select whether or not
a pull-up resistance is used by configuring a register. This
function is enabled either in single-chip mode or when clock
output is disabled.
CLK
Clock output pin. This function is enabled when both the
external bus and clock output are enabled.
OUT7
Waveform output pin for output compare 7.
13, 14
11, 12
P40, P41
F
General-purpose I/O pins (devices with an “S” suffix in the part
number).
X0A , X1A
B
Input pins for sub-clock (devices without an "S" suffix in the part
number).
15
13
VCC
Power (3.5 V to 5.5 V) input pin.
16
14
VSS
GND pin.
17
15
C
K
This is the power supply stabilization capacitor pin. It should be
connected to a ceramic capacitor with a capacitance of 0.1
F
or higher.
18
16
P42
F
General-purpose I/O pin.
IN6
Trigger input pin for input capture 6.
INT9R
External interrupt request input pin (sub) .
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