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參數(shù)資料
| 型號： | MB90F823PF |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 0.80 MM, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 70/98頁 |
| 文件大小： | 1383K |
| 代理商： | MB90F823PF |
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MB90820 Series
72
14. ROM Correction Function
When the corresponding address matches the value set in the address detection register, the instruction code
to be loaded into the CPU is forced to be replaced with the INT9 instruction code (01H). When executing a set
instruction, the CPU executes the INT9 instruction. The address detection function is implemented by processing
using the INT9 instruction routine.
The device contains two address detection registers, each provided with a compare enable bit. When the value
set in the address detection register matches an address and the interrupt enable bit is “1”, the instruction code
to be loaded into the CPU is forced to be replaced with the INT9 instruction code.
(1) Register configuration
(Continued)
Address: 00009EH
76
5
4
3
2
1
0
PADCSR
Bit
R/W
0
R/W
Initial value
Read/write
00
0
Program Address Detection Control Status Register
AD1E
AD1D
AD0E
AD0D
XX
X
Address: 001FF2H
765
4
3
2
1
0
Program Address Detection Register 0 (Upper Byte)
PADRH0
Bit
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
Initial value
Read/write
15
14
13
12
11
10
9
8
R/W
X
Address: 001FF1H
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
Address: 001FF0H
7
6
54
32
1
0
PADRM0
PADRL0
Initial value
Read/write
Bit
R/W
X
R/W
X
R/W
X
R/W
X
R/W
Initial value
Read/write
Bit
XX
X
Program Address Detection Register 0 (Middle Byte)
Program Address Detection Register 0 (Lower Byte)
15
14
13
12
11
10
9
8
R/W
X
Address: 001FF5H
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
PADRH1
Initial value
Read/write
Bit
Program Address Detection Register 1 (Upper Byte)
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