參數(shù)資料
型號: MB90F574/APFF
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, MICROCONTROLLER, PQFP120
封裝: PLASTIC, LQFP-120
文件頁數(shù): 110/120頁
文件大?。?/td> 1834K
代理商: MB90F574/APFF
MB90570 Series
9
(Continued)
*1 : FPT-120P-M05
*2 : FPT-120P-M13, FPT-120P-M21
Pin no.
Pin name
Circuit
type
Function
LQFP-120 *1
QFP-120 *2
7
P37
E
In single chip mode this is a general-purpose I/O port.
CLK
In external bus mode, this pin functions as the clock (CLK) signal out-
put pin.
9
P40
F
In single chip mode this is a general-purpose I/O port. It can be set to
open drain by the ODR4 register.
SIN0
This is also the UART ch.0 serial data input pin. While UART ch.0 is
in input operation, this input signal is in continuous use, and therefore
the output function should only be used when needed. If shared by
output from other functions, this pin should be output disabled during
SIN operation.
10
P41
F
In single chip mode this is a general-purpose I/O port. It can be set to
open drain by the ODR4 register.
SOT0
This is also the UART ch.0 serial data output pin. This function is valid
when UART ch.0 is enabled for data output.
11
P42
F
In single chip mode this is a general-purpose I/O port. It can be set to
open drain by the ODR4 register.
SCK0
This is also the UART ch.0 serial clock I/O pin. This function is valid
when UART ch.0 is enabled for clock output.
12
P43
F
In single chip mode this is a general-purpose I/O port. It can be set to
open-drain by the ODR4 register.
SIN1
This is also the UART ch.1 serial data input pin. While UART ch.1 is
in input operation, this input signal is in continuous use, and therefore
the output function should only be used when needed. If shared by
output from other functions, this pin should be output disabled during
SIN operation.
13
P44
F
In single chip mode this is a general-purpose I/O port. It can be set to
opendrain by the ODR4 register.
SOT1
This is also the UART ch.1 serial data output pin. This function is valid
when UART ch.1 is enabled for data output.
14
P45
F
In single chip mode this is a general-purpose I/O port. It can be set to
open drain by the ODR4 register.
SCK1
This is also the UART ch.1 serial clock I/O pin. This function is valid
when UART ch.1 is enabled for clock output.
15,16
P46,P47
F
In single chip mode this is a general-purpose I/O port. It can be set to
open drain by the ODR4 register.
PPG0,PPG1
These are also the PPG0, 1 output pins. This function is valid when
PPG0, 1 output is enabled.
17
P50
E
In single chip mode this is a general-purpose I/O port.
SIN2
This is also the I/O serial ch.0 data input pin. During serial data input,
this input signal is in continuous use, and therefore the output function
should only be used when needed.
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