參數(shù)資料
型號(hào)： MB90F523PFF
元件分類(lèi)： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP120
封裝： PLASTIC, LQFP-120
文件頁(yè)數(shù)： 50/106頁(yè)
文件大小： 1541K
代理商： MB90F523PFF
MB90520 Series
48
(2) Input Capture 0, 1 (ICU)
The input capture (ICU) generates an interrupt request to the CPU while storing the current counter value of
the 16-bit free-run timer to the ICU data register (IPCP) upon input of a trigger edge from the external pin.
There are two sets (two channels) of input capture external pins and ICU data registers, enabling measurements
of a maximum of four events.
The input capture has two sets of external input pins (IN0, IN1) and ICU registers (IPCP), enabling
measurements of a maximum of four events.
Trigger edge direction can be selected from rising/falling/both edges.
The input capture can be set to generate an interrupt request at the storage timing of the counter value of the
16-bit free-run timer to the ICU data register (IPCP).
The input compare conforms to the extended intelligent I/O service (EI2OS).
The input capture ( ICU) function is suited for measurements of intervals (frequencies) and pulse-widths.
Register configuration
ICU data register ch.0 ch.1 (IPCP0, IPCP1)
Address
Initial value
XXXXXXXXB
CP15
CP14
CP13
CP12
CP11
CP10
CP09
CP08
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
R
RR
R
Address
Initial value
XXXXXXXXB
CP07
CP06
CP05
CP04
CP03
CP02
CP01
CP00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R
RR
R
RR
ICU control status register (ICS01)
R/W : Readable and writable
R : Read only
X : Indeterminate
IPCP0(upper) : 000051H
IPCP1(upper) : 000053H
Address
000054H
Initial value
00000000B
ICP1
ICP0
ICE1
ICE0
EG11
EG10
EG01
EG00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
IPCP0(lower) : 000050H
IPCP1(lower) : 000052H
Note: This register holds a 16-bit free-run timer value when the valid edge of the corresponding external pin input waveform
is detected. (This register can be word-accessed, but not programmed.)
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