
MB90480 Series
13
s HANDLING DEVICES
1.
Power-on and Preventing Latch-up
CMOS IC devices are subject to the phenomenon known as latch-up in conditions such as the following.
(1) When voltage higher than VCC or lower than VSS are applied to input pins or output pins.
(2) When voltages higher than rated voltage levels are applied between VCC and VSS.
(3) When the AVCC power supply is applied before the VCC power.
Power to an analog system must always be turned on at the same time as the VCC power supply, or after the
digital power supply is on. (Analog power must also be turned off before or at the same time as other power.)
When latch-up occurs, power supply current increases rapidly, resulting in thermal damage to circuit elements.
2.
Treatment of Unused Pins
Leaving unused input pins unconnected can cause abnormal operation. Unused input pins should always be
pulled up or down.When the A/D converter is not in use, be sure to make the necessary connections
AVCC
= AVRH = VCC, and AVSS = VSS.
3.
Notes on Using External Clock
Connections for external clock use :
4.
Treatment of Power Supply Pins (VCC/VSS)
When multiple VCC/VSS pins are present, device design considerations for prevention of latch-up and unwanted
electromagnetic interference, abnormal storobe signal operation due to ground level rise, and conformity with
total output current ratings require that all power supply pins must be externally connected to power supply or
ground.
Consideration should be given to connecting power supply sources to the VCC/VSS terminals of this device with
as low impedane as possible. It is also recommended that a bypass capacitor of approximately 0.1
F be placed
between the VCC and VSS lines as close to this device as possible.
5.
Crystal Oscillator Circuits
Noise around the X0/X1, or X0A/X1A pins may cause this device to operate abnormally. In the interest of stable
operation it is strongly recommended that printed circuit artwork places ground bypass capacitors as close as
possible to the X0/X1, X0A/X1A and crystal oscillator (or ceramic oscillator) and that oscillator lines do not cross
the lines of other circuits.
6.
Notes on during operation of PLL clock mode
If the PLL clock mode is selected, the microcontroller attempt to be working with the self-oscillating circuit even
when there is no external oscillator or external clock input is stopped. Performance of this operation, however,
cannot be guaranteed.
X0
X1
OPEN