參數(shù)資料
型號: MB90F482PF
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 95/101頁
文件大?。?/td> 1063K
代理商: MB90F482PF
MB90480 Series
93
6.
Handling of Semiconductor Devices
Be careful never to exceed maximum rated voltages (preventing latchup)
In CMOS IC devices, a condition known as latchup may occur if voltages higher than VCC or loser than VSS are
applied to input or output pins other than medium-or high-voltage pins, or if the voltage applied between VCC and
VSS exceeds the rated voltage level.
When latchup occurs, the power supply current increases rapidly causing the possibility of thermal damage to
circuit elements. Therefore it is necessary to ensure that maximum ratings are not exceeded in circuit operation.
Similarly, when turning the analog power supply on or off, it is necessary to ensure that the analog power supply
voltages (AVCC and AVRH) and analog input voltages do not exceed the digital power supply (VCC) .
Keep power supply voltages as stable as possible.
Rapid fluctuation of the voltage may cause the device to operate abnormally, even if the voltage remains within
the allowed operaing range. As a standard for power supply voltage stability, it is recommended that the peak-
to-peak VCC ripple voltage at commercial supply frequency (50 Hz to 60 Hz) be 10
% or less of VCC. Also when
the power supply is turned on or off the transient voltage fluctuation be no more than 0.1 V/ms or less.
Precautions when turning the power supply on
In order to prevent abnormal operation in the chip’s internal step-down circuits, a voltage rise time during power-
on of 50
s (0.2 V to 2.7 V) or greater should be assured.
Treatment of N.C. pins
N.C. (internally connected) pins should always be left open.
Treatment of power supply pins on models with A/D converters
Even when the A/D converters are not in use, be sure to make the necessary connections AVCC
= AVRH = VCC,
and AVSS
= VSS.
Precautions for using an external clock
Even when using an external clock signal, an oscilltion stabilization delay is applied after a power-on reset or
when recovering from sub-clock or stop mode. When using an external clock, 25 MHz should be the upper
frequency limit.
Power-on sequence
Always shut off the A/D converter power supply (AVCC, AVRH) and analog input (AN0 to AN7) before shutting
off the digital voltage (VCC) .
Power should be switched on and off so that AVRH does not exceed AVCC.
Treatment of unused pins
Leaving unused input pins unconnected can cause abnormal operation or latchup, leading to permanent damage.
Unused input pins should always be pulled up or down through resistance of at least 2 k
. Any unused input/
output pins may be set to output mode and left open, or set to input mode and treated the same as unused input
pins.
相關(guān)PDF資料
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