參數(shù)資料
型號(hào): MB90662AP-SH
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP64
封裝: PLASTIC, SHRINK, DIP-64
文件頁(yè)數(shù): 156/284頁(yè)
文件大小: 2703K
代理商: MB90662AP-SH
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4.1 Addressing
234
Chapter 4: Instructions
(17) Program counter relative branching address (rel)
With this format, the address of the destination of a branching instruction is the sum of the value of the
PC and the 8-bit displacement value. If the result exceeds 16 bits, the amount of the overflow is
ignored and the bank register is not incremented or decremented; therefore, the address is kept within a
64-kilobyte bank. This format is used in unconditional and conditional branching instructions. Bits 16
to 23 of the address are indicated by PCB.
(18) Direct branching address (addr16)
With this format, the address of the destination of a branching instruction is specified directly by the
displacement value. The displacement value is 16 bits, and indicates the branching destination within a
logical memory space. This format is used in unconditional branching instructions and subroutine call
instructions. Bits 16 to 23 of the address are indicated by PCB.
(19) Physical direct branching address (addr24)
With this format, the address of the destination of a branching instruction is specified directly by the
displacement value. The displacement value is 24 bits, and specifies the physical address of the
branching destination. This format is used in unconditional branching instructions, subroutine call
instructions, and software interrupt instructions.
(20) Accumulator indirect branching address (@A)
In this format, the 16 bits of the accumulator AL specify the branching destination address. This
address indicates a branching destination within a bank space; in this case, bits 16 to 23 of the address
are indicated by the PCB. In the case of JCTX, however, bits 16 to 23 of the address are indicated by
DTB. This format is used in unconditional branching instructions.
(21) Vector address (#vct)
The contents of the specified vector become the branching destination address. There are two data
lengths for vector numbers: 4 bits and 8 bits. This format is used in subroutine call instructions and
software interrupt instructions.
(22) Indirect specification branching address (@ear)
The word data in the address indicated by “ear” is the branching destination address.
(23) Indirect specification branching address (@eam)
The word data in the address indicated by “eam” is the branching destination address.
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相關(guān)代理商/技術(shù)參數(shù)
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