參數(shù)資料
型號(hào)： MB89P965APF
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP48
封裝： 0.80 MM PITCH, PLASTIC, QFP-48
文件頁(yè)數(shù)： 23/48頁(yè)
文件大?。?/td> 578K
代理商： MB89P965APF
MB89960 Series
3
s
s PRODUCT LINEUP
(Continued)
Part No.
Prameter
MB89965
MB89P965A
MB89F969A
MB89PV960
Classification
Mass-produced
products
(mask ROM products)
One-time product
Flash product
Piggyback/
evaluation product
for testing and
development
ROM size
16 K
× 8-bit (Internal mask ROM)
60 K
× 8-bit
32 K
× 8-bit
(External ROM) *
RAM size
512
× 8-bit
1024
× 8-bit
CPU functions
Number of instructions
Instruction bit length
Instruction length
Data bit length
Minimum execution time
Interrupt processing time
: 136
: 8-bit
: 1 to 3 bytes
: 1-, 8-, 16bits
: 0.4
s (at 10 MHz)
: 3.6
s (at 10 MHz)
Pe-
riph-
eral
func-
tions
Ports
Output-only ports (N-ch open drain)
Output-only ports (CMOS)
General-purpose I/O ports (CMOS)
Total
: 6 (4 pins are shared with analog inputs)
(2 pins are shared with resource I/O)
: 8
: 21 (shared with resource I/O)
35 (max.)
Timebase timer
21-bit
Four interrupt intervals selectable 0.82 ms, 3.3 ms, 26.2 ms, or 419.4 ms (approx.) (for
main clock)
Watchdog timer
Reset trigger period : 419.4 ms (10 MHz main clock)
500 ms (32.768 MHz sub-clock)
I2C interface
One channel. Supports Intel SM bus (version 1.0) and Philips I2C bus standards.
Uses a 2-wire protocol for communications with other devices.
Included/Not included
(Specified when order-
ing. See “Ordering In-
formation” for details.)
Included
8/16-bit timer/
counter Timer
2 channel 8-bit timer/counter operation (independent operation clocks for timer 1 and
timer 2) or 16-bit timer/counter operation (operation clock period : 0.8
s to 204.8 s)
can execute an event counter operation and output a square wave using an external
Clock.
1 or 16-bit timer/counter operation mode
Serial I/O
8 bits
LSB-first or MSB-first selectable
Transfer clocks : External or three internal clocks (0.8
s, 3.2 s, 12.8 s)
External
interrupt 1
(edge)
Selectable edge detection (rising, falling, or either edge)
3 independent channels
These can also be used to recover from standby modes (edge detection is still available
in stop mode) .
External
interrupt 2
(level)
1 channel with 8 inputs (“L” level interrupts, independent input enable)
This can also be used to recover from standby modes (level detection is still available in
stop mode) .
相關(guān)PDF資料
PDF描述
MB89P135A-101PFM MICROCONTROLLER, PQFP48
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