
MB89930B Series
2
DS07-12541-7E
(Continued)
Wild Register : 2 bytes
Low-power consumption modes ( sleep mode and stop mode)
SSOP-30 and MQFP-48 package
CMOS Technology
■ PRODUCT LINEUP
(Continued)
Part number
MB89935B
MB89P935B
MB89PV930A
Parameter
Classification
Mass production product
(mask ROM product)
One-time PROM product
(for small-scale production)
Piggyback/evaluation product
(for development)
ROM size
16 K
× 8 bits
(internal mask ROM)
16 K
× 8 bits
(internal PROM)
32 K
× 8 bits
(external EPROM)
RAM size
512
× 8 bits
CPU functions
Number of instructions :
Instruction bit length :
Instruction length :
Data bit length :
Minimum execution time :
Interrupt processing time :
136
8 bits
1 to 3 bytes
1, 8, 16 bits
0.4
s to 6.4 s (10 MHz)
3.6
s to 57.6 s (10 MHz)
Ports
General-purpose I/O ports (CMOS) : 21 (also serve as peripherals )
(4 ports are also an N-ch open-drain type.)
21-bit time
base timer
21-bit Interrupt cycle : 0.82 ms, 3.3 ms, 26.2 ms, or 419.4 ms with 10-MHz main clock
Watchdog timer
Reset generation cycle : 419.4 ms minimum with 10-MHz main clock
8-bit PWM timer
8-bit interval timer operation (square output capable, operating clock cycle :
0.4
s , 3.2 s, 6.4 s, 25.6 s)
8-bit resolution PWM operation (conversion cycle : 102.4
s to 26.84 s : in the selection of
internal shift clock of 8/16-bit capture timer)
Count clock selectable between 8-bit and 16-bit timer/counter outputs
8/16-bit capture
timer/counter
8-bit capture timer/counter
× 1 channel + 8-bit timer or
16-bit capture timer/counter
× 1 channel
Capable of event count operation and square wave output using external clock input with
8-bit timer 0 or 16-bit counter
UART
Transfer data length : 6/7/8 bits
8-bit Serial I/O
8 bits LSB first/MSB first selectable
One clock selectable from four operation clocks
(one external shift clock, three internal shift clocks : 0.8
s, 6.4 s, 25.6 s)
12-bit PPG timer
Output frequency : Pulse width and cycle selectable
External interrupt 1
(wake-up function)
3 channels (Interrupt vector, request flag, request output enabled)
Edge selectable (Rising edge, falling edge, or both edges)
Also available for resetting stop/sleep mode (Edge detectable even in stop mode)
External interrupt 2
(wake-up function)
1 channel with 8 inputs (Independent L-level interrupt and input enable)
Also available for resetting stop/sleep mode (Level detectable even in stop mode)