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參數(shù)資料
| 型號： | MB89P825PFM |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 5 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數(shù)： | 24/37頁 |
| 文件大小： | 402K |
| 代理商： | MB89P825PFM |
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MB89820 Series
30
(5) Serial I/O Timing
(VCC = +5.0 V
±10%, VSS = 0.0 V, TA = –40°C to +85°C)
*: For information on tinst, see “(4) Instruction Cycle.”
(6) UART Timing
(VCC = +5.0 V
±10%, VSS = 0.0 V, TA = –40°C to +85°C)
*: For information on tinst, see “(4) Instruction Cycle.”
Parameter
Symbol
Pin
Condition
Value
Unit
Remarks
Min
Max
Serial clock cycle time
tSCYC
SCK
Internal
shift clock
mode
2 tinst*—
s
SCK
↓ → SO time
tSLOV
SCK, SO
–200
200
ns
Valid SI
→ SCK ↑
tIVSH
SI, SCK
0.5 tinst*—
s
SCK
↑ → valid SI hold time
tSHIX
SCK, SI
0.5 tinst*—
s
Serial clock “H” pulse width
tSHSL
SCK
External
shift clock
mode
1 tinst*—
s
Serial clock “L” pulse width
tSLSH
1 tinst*—
s
SCK
↓ → SO time
tSLOV
SCK, SO
0
200
ns
Valid SI
→ SCK ↑
tIVSH
SI, SCK
0.5 tinst*—
s
SCK
↑ → valid SI hold time
tSHIX
SCK, SI
0.5 tinst*—
s
Parameter
Symbol
Pin
Condition
Value
Unit
Remarks
Min
Max
Serial clock cycle time
tSCYC
SCK
Internal
shift clock
mode
2 tinst*—
s
SCK
↓ → SO time
tSLOV
SCK, SO
–200
200
ns
Valid SI
→ SCK ↑
tIVSH
SI, SCK
0.5 tinst*—
s
SCK
↑ → valid SI hold time
SHIX
SCK, SI
0.5 tinst*—
s
Serial clock “H” pulse width
tSHSL
SCK
External
shift clock
mode
1 tinst*—
s
Serial clock “L” pulse width
tSLSH
1 tinst*—
s
SCK
↓ → SO time
tSLOV
SCK, SO
0
200
ns
Valid SI
→ SCK ↑
tIVSH
SI, SCK
0.5 tinst*—
s
SCK
↑ → valid SI hold time
tSHIX
SCK, SI
0.5 tinst*—
s
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