參數(shù)資料
型號(hào): MB89P485-101PMC
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP64
封裝: 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64
文件頁(yè)數(shù): 15/56頁(yè)
文件大?。?/td> 1476K
代理商: MB89P485-101PMC
MB89480 Series
22
DS07-12559-2E
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule illustrated below.
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and
bits for control of CPU operations at the time of an interrupt.
H-flag
: Set to "1" when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Clear
to "0" otherwise. This flag is for decimal adjustment instructions.
I-flag
: Interrupt is allowed when this flag is set to "1". Interrupt is prohibited when the flag is set to "0". Clear
to "0" when reset.
IL1, 0
: Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is
higher than the value indicated by this bit.
N-flag
: Set to "1" if the MSB is set to "1" as the result of an arithmetic operation. Clear to "0" otherwise.
Z-flag
: Set to "1" when an arithmetic operation results in "0". Clear to "0" otherwise.
V-flag
: Set to "1" if a signed numeric value overflows because of an arithmetic calculation. Clear to "0" if the
overflow does not occur.
C-flag
: Set to "1" when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Clear to
"0" otherwise. Set to the shift-out value in the case of a shift instruction.
IL1
IL0
Interrupt level
Priority
00
1
High
Low = no interrupt
01
10
2
11
3
Rule for Conversion of Actual Addresses of the General-purpose Register Area
“0”
A15
“0”
A14
“0”
A13
“0”
A12
“0”
A11
“0”
A10
“0”
A9
“1”
A8
R4
A7
R3
A6
R2
A5
R1
A4
R0
A3
b2
A2
b1
A1
b0
A0
Lower OP codes
RP
Generated addresses
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