參數(shù)資料
型號(hào): MB89F202
廠商: Fujitsu Limited
元件分類: 8位微控制器
英文描述: 8-Bit Proprietary Microcontroller
中文描述: 8位微控制器專有
文件頁數(shù): 19/44頁
文件大?。?/td> 427K
代理商: MB89F202
MB89202 Series
19
I/O MAP
(Continued)
Address
Register name
Register description
Read/write
Initial value
0000
H
PDR0
Port 0 data register
R/W
X X X X X X X X
0001
H
DDR0
Port 0 data direction register
W
0 0 0 0 0 0 0 0
0002
H
to 00006
H
Reserved
0007
H
SYCC
System clock control register
R/W
1 - - MM1 0 0
0008
H
STBC
Standby control register
R/W
0 0 0 1 0 - - -
0009
H
WDTC
Watchdog timer control register
R/W
0 - - - X X X X
000A
H
TBTC
Time-base timer control register
R/W
0 0 - - - 0 0 0
000B
H
Reserved
000C
H
PDR3
Port 3 data register
R/W
X X X X X X X X
000D
H
DDR3
Port 3 data direction register
W
0 0 0 0 0 0 0 0
000E
H
RSFR
Reset flag register
R
X X X X - - - -
000F
H
PDR4
Port 4 data register
R/W
- - - - X X X X
0010
H
DDR4
Port 4 data direction register
R/W
- - - - 0 0 0 0
0011
H
OUT4
Port 4 output format register
R/W
- - - - 0 0 0 0
0012
H
PDR5
Port 5 data register
R/W
- - - - - - - X
0013
H
DDR5
Port 5 data direction register
R/W
- - - - - - - 0
0014
H
RCR21
12-bit PPG control register 1
R/W
0 0 0 0 0 0 0 0
0015
H
RCR22
12-bit PPG control register 2
R/W
- - 0 0 0 0 0 0
0016
H
RCR23
12-bit PPG control register 3
R/W
0 - 0 0 0 0 0 0
0017
H
RCR24
12-bit PPG control register 4
R/W
- - 0 0 0 0 0 0
0018
H
BZCR
Buzzer register
R/W
- - - - - 0 0 0
0019
H
TCCR
Capture control register
R/W
0 0 0 0 0 0 0 0
001A
H
TCR1
Timer 1 control register
R/W
0 0 0 - 0 0 0 0
001B
H
TCR0
Timer 0 control register
R/W
0 0 0 0 0 0 0 0
001C
H
TDR1
Timer 1 data register
R/W
X X X X X X X X
001D
H
TDR0
Timer 0 data register
R/W
X X X X X X X X
001E
H
TCPH
Capture data register H
R
X X X X X X X X
001F
H
TCPL
Capture data register L
R
X X X X X X X X
0020
H
TCR2
Timer output control register
R/W
- - - - - - 0 0
0021
H
Reserved
0022
H
CNTR
PWM control register
R/W
0 - 0 0 0 0 0 0
0023
H
COMR
PWM compare register
W
X X X X X X X X
0024
H
EIC1
External interrupt 1 Control register 1
R/W
0 0 0 0 0 0 0 0
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