參數(shù)資料
型號(hào): MB89635RP-SH
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PDIP64
封裝: SHRINK, DIP-64
文件頁(yè)數(shù): 118/153頁(yè)
文件大?。?/td> 7326K
代理商: MB89635RP-SH
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MB89630 SERIES HARDWARE MANUAL
2-44
(4) Description of operation
(a) Timer operation
Setting the PTX bits 1 and 2 of the CNTR1 to 0 gives the timer-operation mode. When the TPE bits 1 and
2 of the CNTR2 are set to 1, the counter starts incrementing from 00H. When the value of the counter
agrees with that of the COMR, the counter is cleared on the next count clock pulse and incrementing
restarts. Therefore, the TIR bits 1 and 2 are set and the output pin is reversed (when the TPE bits 1 and 2
are 0, the output pin is fixed at Low level) in cycles of the count clock pulses when 00H is written at the
COMR, or in cycles 256 times longer than those of the count clock pulses when FFH is written.
If the value of the COMR is rewritten in the timer-operation mode, it becomes effective from the next cycle
(when the value of the counter is 00H, the value of the COMR is transferred to the comparator latch).
Fig. 2.16 Timer Operation
If the TIE bits 1 and 2 of the CNTR2 are set to 1, an interrupt occurs when the values of the counter and
COMR agree. During interrupt processing, the TIR bits 1 and 2 are used as the interrupt flag. The TIR bits
1 and 2 are set to 1 irrespective of the value of the TIE bits 1 and 2.
Writing 0 at the TIR bits 1 and 2 permits clearing of the interrupt source or the TIR bits 1 and 2. When the
Read Modify Write instruction is read, the TIR bits 1 and 2 is set so that 1 can always be read to prevent
erroneous clearing.
The count clock pulse can be selected from four clock pulses from the prescaler by the clock pulse select
bits SC11, SC10, SC21, and SC20 of the CNTR1 register. When 1 is written at the CK12 bit of the CNTR2
register, CH1 toggle output is selected as the input clock of CH2 irrespective of the values of the SC21 and
SC20 bits.
Note: When the PWM operation mode is specified, do not put CH1 in the CK12 mode (do not write 1 at the
CK12 bit).
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