參數(shù)資料
型號(hào): MB89537HPFM
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 12.5 MHz, MICROCONTROLLER, PQFP64
封裝: PLASTIC, QFP-64
文件頁(yè)數(shù): 30/50頁(yè)
文件大?。?/td> 1151K
代理商: MB89537HPFM
36
MB89530H Series
(7) I2C timing
(VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = –40
°C to +85°C)
For information in tINST, see "(4) Instruction Cycle".
m is defined in the ICCR CS3 and CS3 (bit 4 to bit 3)
n is defined in the ICCR CS2 to CS0 (bit 2 to bit 0)
t DOSU shows that interrupt period is under than "L" width
The specification of SDA, SCL output is on the assumption that rising time is 0 ns..
Parameter
Symbol
Pin
Con-
dition
Value
Unit
Remarks
Min.
Max.
Start condition output
tSTA
SCL
SDA
1/4tINST x
m x n - 20
1/4tINST x
m x n + 20
ns
master
mode
Stop condition output
tSTO
SCL
SDA
1/4tINST x
(m x n + 8) - 20
1/4tINST x
(m x n + 8) + 20
ns
master
mode
Start condition detect
tSTA
SCL
SDA
1/4tINST x 6 + 40
—ns
Stop condition detect
tSTO
SCL
SDA
1/4tINST x 6 + 40
ns
Re-start condition output
tSTASU
SCL
SDA
1/4tINST x
(m x n + 8) - 20
1/4tINST x
(m x n + 8) + 20
ns
master
mode
Re-start condition detect
tSTASU
SCL
SDA
1/4tINST x 4 + 40
ns
SCL output LOW width
tLOW
SCL
1/4tINST x
m x n - 20
1/4tINST x
m x n + 20
ns
master
mode
SCL output HIGHT width
tHIGH
SCL
1/4tINST x
(m x n + 8) - 20
1/4tINST x
(m x n + 8) + 20
ns
master
mode
SDA output delay
tDO
SDA
1/4tINST x 4 - 20
1/4tINST x 4 + 20
ns
SDA output setup time after
interrupt
tDOSU
SDA
1/4tINST x 4 - 20
ns
SCL input LOW pulse width
tLOW
SCL
1/4tINST x 6 + 40
ns
SCL input HIGH pulse width
tHIGH
SCL
1/4 tINST x 2 + 40
ns
SDA input setup time
tSU
SDA
40
ns
SDA hold time
tHO
SDA
0
ns
SDA
SCL
SDA
SCL
1
ACK
9
67
8
9
tDO
tSTASU
tSTA
tLOW
tHO
tDO
tSU
tHO
tDOSU
tSU
tHO
tDO
tDOSU
tHIGH
tLOW
tSTO
Data transmit (master/slave)
Data receive (master/slave)
ACK
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