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參數(shù)資料
| 型號(hào)： | MB881822BWQN-G-JN-EFE1 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 100 MHz, OTHER CLOCK GENERATOR, PQCC24 |
| 封裝： | 2.50 X 3.50 MM, 0.80 MM HEIGHT, 0.40 MM PITCH, PLASTIC, QFN-24 |
| 文件頁數(shù)： | 17/32頁 |
| 文件大?。?/td> | 938K |
| 代理商： | MB881822BWQN-G-JN-EFE1 |
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MB88182
24
DS04-29138-5E
<Definition of modulation frequency and number of input clocks per modulation>
This product contains the modulation period to realize the efficient EMI reduction.
The modulation period FMOD depends on the input frequency and changes between FMOD (Min) and FMOD (Max).
Furthermore, the typical value of the electrical characteristics is equivalent to the average value of the modulation
period FMOD.
<Output slew rate (SR) >
<Cycle-cycle jitter (tJC
= |tn tn + 1|)>
t
FMOD (Min)
FMOD (Max)
t
V
Modulation waveform
Input clock
Clock count
NMOD (Max)
Clock count
NMOD (Min)
f (Output frequency)
(VDD
0.2) V*,(VDP 0.2) V*,
(VDDE
0.2) V*
0.2 V
CLK1
CLK2
CLK3
CLK4
tr
tf
* : The value is differ depending on the power supply pin.
CLK1 : (VDD
0.2)V or (VDDE 0.2)V (depending on models)
CLK2 : (VDDE
0.2)V
CLK3 : CLK4: (VDP
0.2)V
Note: SR
= (power supply voltage 0.4) / tr, SR = (power supply voltage 0.4) / tf
tn
tn+1
CLK1
CLK2
CLK3
CLK4
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