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參數(shù)資料
| 型號： | MB2652BB,557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | MB SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PQFP52 |
| 封裝： | PLASTIC, QFP-52 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 87K |
| 代理商： | MB2652BB,557 |
Philips Semiconductors Products
Product specification
MB2652
Dual octal transceiver/registers,
non-inverting (3-State)
August 23, 1993
3
LOGIC DIAGRAM
1D
C1
Q
nB1
nB2
nB3
nB4
nB5
nB6
nB7
nA1
nA2
nA3
nA4
nA5
nA6
nA7
DETAIL A X 7
nOEBA
nOEAB
nCPBA
nSBA
nCPAB
nSAB
nB0
1D
C1
Q
nA0
1of 8 Channels
FUNCTION TABLE
INPUTS
DATA I/O
OPERATING MODE
nOEAB
nOEBA
nCPAB
nCPBA
nSAB
nSBA
nAx
nBx
L
H
H or L
↑
H or L
↑
X
Input
Isolation
Store A and B data
X
H
↑
H or L
↑
X
**
X
Input
Unspecified
output*
Store A, Hold B
Store A in both registers
L
X
L
H or L
↑
X
**
Unspecified
output*
Input
Hold A, Store B
Store B in both registers
L
X
H or L
X
L
H
Output
Input
Real time B data to A bus
Stored B data to A bus
H
X
H or L
X
L
H
X
Input
Output
Real time A data to B bus
Store A data to B bus
H
L
H or L
H
Output
Stored A data to B bus
Stored B data to A bus
H = High voltage level
L
= Low voltage level
X = Don’t care
↑ = Low-to-High clock transition
*
The data output function may be enabled or disabled by various signals at the nOEBA and nOEAB inputs. Data input functions are
always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
**
If both Select controls (nSAB and nSBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must
be staggered in order to load both registers.
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