參數(shù)資料
型號: MAXQ613A-0000+
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 12 MHz, RISC MICROCONTROLLER, QCC32
封裝: ROHS COMPLAINT, TQFN-32
文件頁數(shù): 9/28頁
文件大?。?/td> 1471K
代理商: MAXQ613A-0000+
16-Bit Microcontroller with Infrared Module
MAXQ613
______________________________________________________________________________________ 17
enabled. The IR module continues to operate in receive
mode until it is stopped by switching into transmit mode
(IRMODE = 1) or clearing IREN = 0.
Carrier Burst-Count Mode
A special mode reduces the CPU processing burden
when performing IR learning functions. Typically, when
operating in an IR learning capacity, some number of
carrier cycles are examined for frequency determina-
tion. Once the frequency has been determined, the IR
receive function can be reduced to counting the number
of carrier pulses in the burst and the duration of the
combined mark-space time within the burst. To simplify
this process, the receive burst-count mode (as enabled
by the RXBCNT bit) can be used. When RXBCNT = 0,
the standard IR receive capture functionality is in place.
When RXBCNT = 1, the IRV capture operation is dis-
abled and the interrupt flag associated with the capture
no longer denotes a capture. In the carrier burst-count
mode, the IRMT register only counts qualified edges.
The IRIF interrupt flag (normally used to signal a capture
when RXBCNT = 0) now becomes set if two IRCA cycles
elapse without getting a qualified edge. The IRIF interrupt
flag thus denotes absence of the carrier and the begin-
ning of a space in the receive signal. When the RXBCNT
bit is changed from 0 to 1, the IRMT register is set to
0001h. The IRCFME bit is still used to define whether the
IRV register is counting system IRCLK clocks or IRCA-
defined carrier cycles. The IRXRL bit defines whether
the IRV register is reloaded with 0000h on detection of a
qualified edge (per the IRXSEL[1:0] bits). Figure 6 and
the descriptive sequence embedded
in the figure illustrate the expected usage of the receive
burst-count mode.
16-Bit Timers/Counters
The microcontroller provides two timers/counters that
support the following functions:
16-bit timer/counter
16-bit up/down autoreload
Counter function of external pulse
16-bit timer with capture
16-bit timer with compare
Input/output enhancements for pulse-width modulation
Set/reset/toggle output state on comparator match
Prescaler with 2n divider (for n = 0, 2, 4, 6, 8, 10)
USART
The device provides a USART peripheral with the follow-
ing features:
2-wire interface
Full-duplex operation for asynchronous data transfers
Half-duplex operation for synchronous data transfers
Programmable interrupt when transmit or receive data
operation completes
Independent programmable baud-rate generator
Optional 9th bit parity support
Start/stop bit support
Figure 5. IR Capture
0
1
0000h
IRV
CARRIER MODULATION
CARRIER GENERATION
IRCLK
IRCFME
IRCAL + 1
IRCAH + 1
INTERRUPT TO CPU
IRDATA
IRRX PIN
RESET IRV TO 0000h
IR TIMER OVERFLOW
IR INTERRUPT
IRXRL
COPY IRV TO IRMT
ON EDGE DETECT
EDGE DETECT
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