參數(shù)資料
型號(hào)： MAX9875ERP+T
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 17/30頁(yè)
文件大小： 0K
描述： IC AUDIO SUBSYSTEM 20UCSP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
系列： DirectDrive®
類型： D 類
輸出類型： 1-通道（單聲道），帶立體聲耳機(jī)
在某負(fù)載時(shí)最大輸出功率 x 通道數(shù)量： 825mW x 1 @ 4 歐姆; 53mW x 2 @ 16 歐姆
電源電壓： 2.7 V ~ 5.25 V
特點(diǎn)： 消除爆音，差分輸入，I²C，靜音，短路和熱保護(hù)，關(guān)機(jī)，音量控制
安裝類型： 表面貼裝
供應(yīng)商設(shè)備封裝： 20-UCSP
封裝/外殼： 20-WFBGA，CSPBGA
包裝： 帶卷 (TR)
MAX9875
Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier
24
______________________________________________________________________________________
A
0
SLAVE ADDRESS
REGISTER ADDRESS
DATA BYTE
ACKNOWLEDGE FROM MAX9875
R/W
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
ACKNOWLEDGE FROM MAX9875
B1
B0
B3
B2
B5
B4
B7
B6
S
A
P
Figure 9. Writing One Byte of Data to the MAX9875
1
SCL
START
CONDITION
SDA
28
9
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
Figure 8. Acknowledge
Early STOP Conditions
The MAX9875 recognizes a STOP condition at any
point during data transmission except if the STOP con-
dition occurs in the same high pulse as a START condi-
tion. For proper operation, do not send a STOP
condition during the same SCL high pulse as the
START condition.
Slave Address
The MAX9875 is preprogrammed with a slave address
of 1001101R/(W). The address is defined as the seven
most significant bits (MSBs) followed by the Read/Write
bit. Setting the Read/Write bit to 1 configures the
MAX9875 for read mode. Setting the Read/Write bit to 0
configures the MAX9875 for write mode. The address is
the first byte of information sent to the MAX9875 after
the START condition.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9875 uses to handshake receipt each byte of data
when in write mode (see Figure 8). The MAX9875 pulls
down SDA during the entire master-generated 9th
clock pulse if the previous byte is successfully
received. Monitoring ACK allows for detection of unsuc-
cessful data transfers. An unsuccessful data transfer
occurs if a receiving device is busy or if a system fault
has occurred. In the event of an unsuccessful data
transfer, the bus master may retry communication.
The master pulls down SDA during the ninth clock
cycle to acknowledge receipt of data when the
MAX9875 is in read mode. An acknowledge is sent by
the master after each read byte to allow data transfer to
continue. A not acknowledge is sent when the master
reads the final byte of data from the MAX9875, followed
by a STOP condition.
Write Data Format
A write to the MAX9875 includes transmission of a
START condition, the slave address with the R/W bit set
to 0, one byte of data to configure the internal register
address pointer, one or more bytes of data, and a
STOP condition. Figure 9 illustrates the proper frame
format for writing one byte of data to the MAX9875.
Figure 10 illustrates the frame format for writing n-bytes
of data to the MAX9875.
The slave address with the R/W bit set to 0 indicates
that the master intends to write data to the MAX9875.
The MAX9875 acknowledges receipt of the address
byte during the master-generated 9th SCL pulse.
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MAX9877AERP+T 功能描述:音頻放大器 Audio Subsystem w/DirectDrive RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel
MAX9877AEWP+G45 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述:
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