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參數(shù)資料
| 型號： | MAX9702 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | 1.8W, Filterless, Stereo, Class D Audio Power Amplifier and DirectDrive Stereo Headphone Amplifier |
| 中文描述： | 1.8W、無需濾波、立體聲D類音頻功率放大器和DirectDrive立體聲耳機(jī)放大器 |
| 文件頁數(shù)： | 22/32頁 |
| 文件大小： | 1411K |
| 代理商： | MAX9702 |
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M
Early STOP Conditions
The MAX9702 recognizes a STOP condition at any point
during data transmission except if the STOP condition
occurs in the same high pulse as a START condition.
Slave Address
The MAX9702 is available with one of two preset slave
addresses (see Table 2). The address is defined as the
7 most significant bits (MSBs) followed by the
Read/
Write
bit. The address is the first byte of informa-
tion sent to the MAX9702 after the START condition.
The MAX9702 is a slave device only capable of being
written to. The Read/
Write
bit must always be a zero
when configuring the MAX9702. The MAX9702 does
not acknowledge the receipt of its address even if R/
W
is set to 1.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9702 uses to handshake receipt each byte of data
(see Figure 11). The MAX9702 pulls down SDA during
the master-generated 9th clock pulse. The SDA line
must remain stable and low during the high period of
the acknowledge clock pulse. Monitoring ACK allows
for detection of unsuccessful data transfers. An unsuc-
cessful data transfer occurs if a receiving device is
busy or if a system fault has occurred. In the event of
an unsuccessful data transfer, the bus master may
reattempt communication.
Write Data Format
A write to the MAX9702 includes transmission of a
START condition, the slave address with the R/
W
bit set
to zero (see Table 2), 1 byte of data to configure the
command register, and a STOP condition. Figure 12
illustrates the proper format for one frame.
The MAX9702 only accepts write data, but it acknowl-
edges the receipt of its address byte with the R/
W
bit
set high. The MAX9702 does not write to the SDA bus
in the event that the R/
W
bit is set high. Subsequently,
the master reads all 1s from the MAX9702. Always set
the R/
W
bit to zero to avoid this situation.
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
22
______________________________________________________________________________________
Table 2. MAX9702 Address Map
MAX9702 SLAVE ADDRESS
A3
1
1
PART
A6
1
1
A5
0
0
A4
0
0
A2
1
1
A1
0
1
A0
0
0
R/
W
0
0
MAX9702
MAX9702B
1
SCL
START
CONDITION
SDA
2
8
9
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
S
A
0
ACKNOWLEDGE FROM MAX9702
R/W
ACKNOWLEDGE
FROM MAX9702
B7 B6 B5 B4 B3 B2
COMMAND BYTE IS STORED ON
RECEIPT OF STOP CONDITION
A
P
B1 B0
SLAVE ADDRESS
COMMAND BYTE
Figure 11. Acknowledge
Figure 12. Write Data Format Example
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX9702B | 1.8W, Filterless, Stereo, Class D Audio Power Amplifier and DirectDrive Stereo Headphone Amplifier |
| MAX9703 | Hex 2-Input OR Drivers 20-CDIP -55 to 125 |
| MAX9703-MAX9704 | 15W, Filterless, Spread-Spectrum Mono/Stereo Class D Amplifiers |
| MAX9703ETJ | 15W, Filterless, Spread-Spectrum Mono/Stereo Class D Amplifiers |
| MAX9704ETJ | 15W, Filterless, Spread-Spectrum Mono/Stereo Class D Amplifiers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9702BETI+ | 制造商:Maxim Integrated Products 功能描述:AUD AMP HDPH/SPKR 2CH STEREO 1.8W/0.045W CLS-AB/CLS-D 28TQFN - Rail/Tube |
| MAX9702BETI+T | 制造商:Maxim Integrated Products 功能描述:AUD AMP HDPH/SPKR 2CH STEREO 1.8W/0.045W CLS-AB/CLS-D 28TQFN - Tape and Reel |
| MAX9702BEUI+ | 制造商:Maxim Integrated Products 功能描述:AUD AMP HDPH/SPKR 2CH STEREO 1.8W/0.045W CLS-AB/CLS-D 28TSSO - Rail/Tube |
| MAX9702BEUI+T | 制造商:Maxim Integrated Products 功能描述:AUD AMP HDPH/SPKR 2CH STEREO 1.8W/0.045W CLS-AB/CLS-D 28TSSO - Tape and Reel |
| MAX9702ETI+ | 功能描述:音頻放大器 1.8W Filterless Class D Audio Amp RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
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