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參數(shù)資料
| 型號： | MAX9421 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Quad Differential LVECL-to-LVPECL Translators |
| 中文描述： | 四路、差分LVECL至LVPECL轉(zhuǎn)換器 |
| 文件頁數(shù)： | 8/13頁 |
| 文件大小： | 341K |
| 代理商： | MAX9421 |
Applications Information
Input Bias
Unused inputs should be biased or driven as shown in
Figure 5. This avoids noise coupling that might cause
toggling at the unused outputs.
Output Termination
Terminate open-emitter outputs (MAX9420/MAX9422)
through 50
to V
CC
- 2V or use an equivalent Thevenin
termination. Terminate outputs using identical termina-
tion on each for the lowest output-to-output skew. When
a single-ended signal is taken from a differential output,
terminate both outputs. For example, if OUT_ is used as
a single-ended output, terminate both OUT_ and
OUT_
.
Ensure that the output currents do not exceed the cur-
rent limits as specified in the
Absolute Maximum
Ratings
table. Under all operating conditions, the
device
’
s total thermal limits should be observed.
Power-Supply Bypassing
Adequate power-supply bypassing is necessary to
maximize the performance and noise immunity. Bypass
V
CC
to GND and V
EE
to GND with high-frequency sur-
face-mount ceramic 0.1μF and 0.01μF capacitors in
parallel as close to the device as possible, with the
0.01μF capacitor closest to the device pins. Use multi-
ple parallel vias for ground-plane connection to mini-
mize inductance.
Circuit Board Traces
Input and output trace characteristics affect the perfor-
mance of the MAX9420
–
MAX9423. Connect each of the
inputs and outputs to a 50
characteristic impedance
trace. Avoid discontinuities in differential impedance
and maximize common-mode noise immunity by main-
taining the distance between differential traces and
avoid sharp corners. Minimize the number of vias to
prevent impedance discontinuities. Reduce the reflec-
tions by maintaining 50
characteristic impedance
through connectors and across cables. Minimize skew
by matching the electrical length of the traces.
Chip Information
TRANSISTOR COUNT: 927
PROCESS: Bipolar
M
Quad Differential LVECL-to-LVPECL Translators
8
_______________________________________________________________________________________
Figure 4. CLK-to-OUT Propagation Delay Timing Diagram
V
IHD
- V
ILD
V
IHD
- V
ILD
V
OH
- V
OL
CLK
CLK
IN_
IN_
OUT_
OUT_
t
H
t
S
t
H
t
PLH2
t
PHL2
SEL = LOW
EN = HIGH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX9423 | Quad Differential LVECL-to-LVPECL Translators |
| MAX9423EGJ | LVECL-TO-LVPECL TRANSLATOR|BIPOLAR|LLCC|32PIN|PLASTIC |
| MAX9423EHJ | LVECL-TO-LVPECL TRANSLATOR|BIPOLAR|TQFP|32PIN|PLASTIC |
| MAX9424EVKIT | Evaluation Kit for the MAX9424/MAX9425/MAX9426/MAX9427 |
| MAX9425 | Lowest Jitter Quad PECL-to-ECL Differential Translators |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9421EHJ | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube 制造商:Rochester Electronics LLC 功能描述: |
| MAX9422EHJ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX9423EHJ | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube 制造商:Rochester Electronics LLC 功能描述: |
| MAX9424EHJ | 功能描述:校驗(yàn)器 IC 3V/5V Rail-Rail Comparator RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類型: 通道數(shù)量: 輸出類型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補(bǔ)償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時(shí)間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel |
| MAX9424EHJ-T | 功能描述:校驗(yàn)器 IC 3V/5V Rail-Rail Comparator RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類型: 通道數(shù)量: 輸出類型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補(bǔ)償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時(shí)間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel |
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