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參數(shù)資料
| 型號： | MAX9394EHJ |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 2:1 Multiplexers and 1:2 Demultiplexers with Loopback |
| 中文描述： | LINE TRANSCEIVER, PQFP32 |
| 封裝： | 5 X 5 MM, 1 MM HEIGHT, TQFP-32 |
| 文件頁數(shù)： | 9/13頁 |
| 文件大小： | 361K |
| 代理商： | MAX9394EHJ |
Balanced cables such as twisted pair offer superior
signal quality and tend to generate less EMI due to
canceling effects.
Board Layout
Use a four-layer printed circuit (PC) board providing
separate signal, power, and ground planes for high-
speed signaling applications. Bypass V
CC
to GND as
close to the device as possible. Install termination
resistors as close to receiver inputs as possible. Match
the electrical length of the differential traces to minimize
signal skew.
M
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
_______________________________________________________________________________________
9
LOGIC INPUTS
LB_SELB
DIFFERENTIAL OUTPUTS
OUTA_ /
OUTA_
INA selected
INA selected
INA selected
INB0 selected
INB1 selected
INB0 selected
INB1 selected
LB_SELA
0
0
0
1
1
1
1
BSEL
0
1
X
0
1
0
1
OUTB /
OUTB
INB0 selected
INB1 selected
INA selected
INB0 selected
INB1 selected
INA selected
INA selected
0
0
1
0
0
1
1
Table 1. Input Select Truth Table
LB_SEL_
GND or open
V
CC
OUT_ _
Normal inputs selected.
Loopback inputs selected.
Table 2. Loopback Select Truth Table
LB_SELA
0
LB
PULSE
GENERATOR
OUTA0
OUTA0
OUTA1
OUTA1
C
L
R
L
R
L
INA
INA
50
C
L
50
C
L
C
L
MAX9394
MAX9395
ENA0 = ENA1 = HIGH
1 CHANNEL SHOWN.
FROM
CHANNEL B
R
L
= 100
±
1%
C
L
= 1.0pF
Figure 5. Output Transition Time, Propagation Delay, and Output Channel-to-Channel Skew Test Circuit
X = Don’t care.
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