參數(shù)資料
型號(hào): MAX9388EUP
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 通用總線功能
英文描述: Differential 5:1 or 4:1 ECL/PECL Multiplexers with Single/Dual Output Buffers
中文描述: 5 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO20
封裝: 4.40 MM, TSSOP-20
文件頁(yè)數(shù): 4/14頁(yè)
文件大小: 247K
代理商: MAX9388EUP
M
Differential 5:1 or 4:1 ECL/PECL Multiplexers
with Single/Dual Output Buffers
4
_______________________________________________________________________________________
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Measured between input-to-output paths of the same part at the signal crossing points for a same-edge transition of the
differential input signal.
Note 11:
Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge
transition.
Note 12:
Device jitter added to the differential input signal.
Measurements are made with the device in thermal equilibrium.
Current into an I/O pin is defined as positive. Current out of an I/O pin is defined as negative.
DC parameters production tested at T
A
= +25
°
C and guaranteed by design over the full operating temperature range.
Single-ended data input operation using V
BB_
is limited to (V
CC
- V
EE
)
3.0V.
Use V
BB_
only for inputs that are on the same device as the V
BB_
reference.
All pins open except V
CC
and V
EE
.
Guaranteed by design and characterization. Limits are set at ±6 sigma.
Measured from the 50% point of the input signal with the 50% point equal to V
BB
, to the 50% point of the output signal.
Measured between outputs of the same part at the signal crossing points for a same-edge transition.
AC ELECTRICAL CHARACTERISTICS (continued)
V
CC
- V
EE
= 2.375V to 5.5V, outputs loaded with 50
±
1% to V
CC
- 2V, V
IHD
- V
ILD
= 0.15V to 1V, f
IN
2.5GHz input duty cycle
= 50%, input transition time = 125ps (20% to 80%). Typical values are at V
CC
- V
EE
= 3.3V, V
IHD
= V
CC
- 1V, V
ILD
= V
CC
- 1.5V, f
IN
=
622MHz, input duty cycle = 50%, input transition time = 125ps (20% to 80%), unless otherwise noted.) (Note 7)
-40
°
C
TYP
0.3
0.3
0.3
+25
°
C
TYP
0.3
0.3
0.3
+85
°
C
TYP
0.3
0.3
0.3
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
1.15
1.15
1.15
MIN
MAX
1.15
1.15
1.15
MIN
MAX
1.15
1.15
1.15
UNITS
f
IN
= 156M H z
f
IN
= 622M H z
f
IN
= 2.5GH z
Added Random
Jitter (Note 12)
t
RJ
Clock
pattern
ps(RMS)
f
IN
= 156M b p s
33
95
33
95
33
95
Added
Deterministic
Jitter (Note 12)
T
DJ
PRBS
2
23
- 1
f
IN
= 622M b p s
21
61
21
61
21
61
ps
P-P
Switching
Frequency
f
MAX
V
OH
- V
OL
300mV,
Figure 2
2.7
2.7
2.7
GHz
Select Toggle
Frequency
f
SEL
100
100
100
MHz
Output Rise and
Fall Time (20%
to 80%)
t
R
, t
F
Figure 2
67
105
138
74
117
155
81
128
165
ps
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