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參數(shù)資料
| 型號： | MAX9386 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Differential 5:1 or 4:1 ECL/PECL Multiplexers with Single/Dual Output Buffers |
| 中文描述： | 差分5:1或4:1 ECL/PECL多路復用器，帶有單/雙輸出緩沖器 |
| 文件頁數(shù)： | 11/14頁 |
| 文件大小： | 247K |
| 代理商： | MAX9386 |
Applications Information
Output Termination
Terminate the outputs through 50
to V
CC
- 2V or use
equivalent Thevenin terminations. Terminate each Q
and
Q
output with identical termination on each for min-
imal distortion. When a single-ended signal is taken
from the differential output, terminate both Q and
Q
.
Ensure that output currents do not exceed the current
limits as specified in the
Absolute Maximum Ratings
table. Under all operating conditions, the device
’
s total
thermal limits should be observed.
Supply Bypassing
Bypass V
CC
to V
EE
with high-frequency surface-mount
ceramic 0.1μF and 0.01μF capacitors. For PECL, bypass
each V
CC
to V
EE
. For ECL, bypass each V
EE
to V
CC
.
Place the capacitors as close to the device as possible
with the 0.01μF capacitor closest to the device pins.
Use multiple vias when connecting the bypass capaci-
tors to ground. When using the V
BB1
or V
BB2
reference
outputs, bypass each one with a 0.01μF ceramic
capacitor to V
CC
. If the V
BB1
or V
BB2
reference outputs
are not used, they can be left open.
Traces
Circuit board trace layout is very important to maintain
the signal integrity of high-speed differential signals.
Maintaining integrity is accomplished in part by reduc-
ing signal reflections and skew, and increasing com-
mon-mode noise immunity.
Signal reflections are caused by discontinuities in the
50
characteristic impedance of the traces. Avoid dis-
continuities by maintaining the distance between differ-
ential traces, not using sharp corners or using vias.
Maintaining distance between the traces also increases
common-mode noise immunity. Reducing signal skew
is accomplished by matching the electrical length of
the differential traces.
Chip Information
TRANSISTOR COUNT: 583
PROCESS: Bipolar
M
Differential 5:1 or 4:1 ECL/PECL Multiplexers
with Single/Dual Output Buffers
______________________________________________________________________________________
11
V
BB1
V
BB2
V
CC
V
EE
V
CC
V
EE
MUX
150k
150k
120k
150k
250k
D0
D0
D1
D1
D2
D2
D3
D3
D4**
SEL0
SEL1
SEL2**
D4**
Q0 (Q*)
Q0 (Q*)
MAX9386 (*) DOES NOT HAVE Q1 AND Q1 OUTPUTS, AND
MAX9388 (**) DOES NOT HAVE D4, D4, AND SEL2 INPUTS.
Q1*
Q1*
D_
D_
MAX9386
MAX9387
MAX9388
V
EE
Functional Block Diagram
Ordering Information (continued)
PART
TEMP
RANGE
PIN-
PACKAGE
SELECTION
MAX9387
EUG
-40
°
C to +85
°
C
24 TSSOP
5:1 mux with 2
output buffers
M AX 9387E E G -40
°
C to +85
°
C
24 QSOP
5:1 mux with 2
output buffers
MAX9388
EUP
-40
°
C to +85
°
C
20 TSSOP
4:1 mux with 1
output buffer
MAX9388EEP*
-40
°
C to +85
°
C
20 QSOP
4:1 mux with 1
output buffer
*
Future product—contact factory for availability.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX9386EEP | Differential 5:1 or 4:1 ECL/PECL Multiplexers with Single/Dual Output Buffers |
| MAX9386EUP | Differential 5:1 or 4:1 ECL/PECL Multiplexers with Single/Dual Output Buffers |
| MAX9387 | Differential 5:1 or 4:1 ECL/PECL Multiplexers with Single/Dual Output Buffers |
| MAX9387EEG | Differential 5:1 or 4:1 ECL/PECL Multiplexers with Single/Dual Output Buffers |
| MAX9388 | Differential 5:1 or 4:1 ECL/PECL Multiplexers with Single/Dual Output Buffers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9386EEP | 制造商:Maxim Integrated Products 功能描述:DIFFERENTIAL 5:1 OR 4:1 ECL/PECL MULTIPLEXERS - Rail/Tube |
| MAX9386EUP | 制造商:Maxim Integrated Products 功能描述:DIFFERENTIAL 5:1 OR 4:1 ECL/PECL MULTIPLEXERS - Rail/Tube |
| MAX9386EUP+ | 制造商:Maxim Integrated Products 功能描述:CLOCK MLTPLXR 5-IN ECL/LVECL/LVPECL/PECL 20TSSOP - Rail/Tube |
| MAX9386EUP+T | 制造商:Maxim Integrated Products 功能描述:CLOCK MLTPLXR 5-IN ECL/LVECL/LVPECL/PECL 20TSSOP - Tape and Reel |
| MAX9387EEG | 功能描述:時鐘驅(qū)動器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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