參數(shù)資料
型號: MAX9382EVKIT
廠商: Maxim Integrated Products, Inc.
英文描述: Evaluation Kit for the MAX9382/MAX9383
中文描述: MAX9382、MAX9383評估板
文件頁數(shù): 6/9頁
文件大小: 173K
代理商: MAX9382EVKIT
M
1:5 Clock Driver with Selectable
LVPECL Inputs and LVDS Outputs
6
_______________________________________________________________________________________
CLK
CLK
Q_
Q_
t
PLHD
t
PHLD
V
OH
- V
OL
V
IHD
- V
ILD
V
IHD
V
ILD
Q_ - Q_
0V (DIFFERENTIAL)
0V (DIFFERENTIAL)
20%
80%
20%
80%
t
R
t
F
V
OL
V
OH
Figure 1. MAX9310 Timing Diagram
t
S
t
H
t
S
t
PLHD
OUTPUTS ARE LOW
OUTPUTS STAY LOW
EN
CLK
CLK
Q_
Q_
t
H
t
S
= SETUP TIME
t
H
= HOLD TIME
Figure 2. MAX9310
EN
Timing Diagram
Pin Description (continued)
PIN
NAME
FUNCTION
18, 20
V
CC
Positive Supply Voltage. Bypass each V
CC
to GND with 0.1μF and 0.01μF ceramic capacitors.
Place the capacitors as close to the device as possible with the smaller value capacitor closest
to the device.
19
EN
Output Enable Input. Outputs are synchronously enabled on the falling edge of the selected
clock input when
EN
is low. Outputs are synchronously driven to a differential low state on the
falling edge of the selected clock input when
EN
is high. Internal 60k
pulldown to GND
(Figure 2).
相關(guān)PDF資料
PDF描述
MAX9383 ECL/PECL Phase-Frequency Detectors
MAX9311EGJ 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
MAX9313EHJ 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
MAX9313ECJ 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
MAX9311 Quadruple 2-Input Positive-NAND Gates 14-CDIP -55 to 125
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