參數(shù)資料
型號(hào)： MAX9320XESA
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 時(shí)鐘及定時(shí)
英文描述： 9320 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封裝： 0.150 INCH, MS-012, SOIC-8
文件頁(yè)數(shù)： 7/10頁(yè)
文件大?。?/td> 614K
代理商： MAX9320XESA
MAX9320/MAX9320A
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
6
_______________________________________________________________________________________
Pin Description (MAX9320)
Pin Description (MAX9320A)
PIN
MAX/SO
SOT23
NAME
FUNCTION
18
Q0
Noninverting Q0 Output. Typically terminate with 50
resistor to VCC - 2V.
27
Q0
Inverting Q0 Output. Typically terminate with 50
resistor to VCC - 2V.
36
Q1
Noninverting Q1 Output. Typically terminate with 50
resistor to VCC - 2V.
45
Q1
Inverting Q1 Output. Typically terminate with 50
resistor to VCC - 2V.
52
VEE
Negative Supply Voltage
64
D
Inverting Differential Input. 60k
pullup to VCC and 100k pulldown to VEE.
73
D
Noninverting Differential Input. 100k
pulldown to VEE.
81
VCC
Positive Supply Voltage. Bypass from VCC to VEE with 0.1F and 0.01F ceramic
capacitors. Place the capacitors as close to the device as possible with the smaller
value capacitor closest to the device.
PIN
SOT23
NAME
FUNCTION
1VCC
Positive Supply Voltage. Bypass from VCC to VEE with 0.1F and 0.01F ceramic
capacitors. Place the capacitors as close to the device as possible with the smaller value
capacitor closest to the device.
2VEE
Negative Supply Voltage
3
D
Inverting Differential Input. 60k
pullup to VCC and 100k pulldown to VEE.
4D
Noninverting Differential Input. 100k
pulldown to VEE.
5
Q1
Inverting Q1 Output. Typically terminate with 50
resistor to VCC - 2V.
6Q1
Noninverting Q1 Output. Typically terminate with 50
resistor to VCC - 2V.
7
Q0
Inverting Q0 Output. Typically terminate with 50
resistor to VCC - 2V.
8Q0
Noninverting Q0 Output. Typically terminate with 50
resistor to VCC - 2V.
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