- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8631 > MAX9316EWP (Maxim Integrated Products)IC CLOCK BUFFER MUX 2:5 20-SOIC PDF資料下載
參數(shù)資料
| 型號(hào)： | MAX9316EWP |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK BUFFER MUX 2:5 20-SOIC |
| 標(biāo)準(zhǔn)包裝： | 36 |
| 類型： | 扇出緩沖器（分配），多路復(fù)用器 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:5 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | HSTL，LVECL，LVPECL |
| 輸出： | LVECL，LVPECL |
| 頻率 - 最大： | 1.5GHz |
| 電源電壓： | 3 V ~ 3.8 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC W |
| 包裝： | 管件 |
MAX9316
Detailed Description
The MAX9316 is a low-skew, 1-to-5 differential driver
designed for clock or data distribution. A 2-to-1 MUX
selects one of the two clock inputs, CLK, CLK and
SCLK. The CLK and CLK input is differential while the
SCLK is single ended. The MUX is switched by the sin-
gle-ended SEL input. A logic low selects the CLK input
and a logic high selects the SCLK input. The SEL logic
threshold is set by the internal voltage reference VBB.
SEL input can be driven by VCC and VEE or by a single-
ended LVPECL/LVECL signal. The selected input is
reproduced at five differential outputs, Q0 to Q4.
Synchronous Enable
The MAX9316 is synchronously enabled and disabled
with outputs in the low state to eliminate shortened
clock pulses. EN is connected to the input of an edge-
triggered D flip-flop. After power-up, drive EN low and
toggle the selected clock input to enable the outputs.
The outputs are enabled on the falling edge of the
selected clock input after EN goes low. The outputs are
disabled to a low state on the falling edge of the select-
ed clock input after EN goes high. The threshold for EN
is equal to VBB.
Supply
For interfacing to differential HSTL and LVPECL signals,
the VCC range is from +3.0 to +3.8V (with VEE ground-
1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Driver
6
_______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1
Q0
Noninverting Q0 Output. Typically terminate with 50
resistor to (VCC - 2V).
2
Q0
Inverting Q0 Output. Typically terminate with 50
resistor to (VCC - 2V).
3
Q1
Noninverting Q1 Output. Typically terminate with 50
resistor to (VCC - 2V).
4
Q1
Inverting Q1 Output. Typically terminate with 50
resistor to (VCC - 2V).
5
Q2
Noninverting Q2 Output. Typically terminate with 50
resistor to (VCC - 2V).
6
Q2
Inverting Q2 Output. Typically terminate with 50
resistor to (VCC - 2V).
7
Q3
Noninverting Q3 Output. Typically terminate with 50
resistor to (VCC - 2V).
8
Q3
Inverting Q3 Output. Typically terminate with 50
resistor to (VCC - 2V).
9
Q4
Noninverting Q4 Output. Typically terminate with 50
resistor to (VCC - 2V).
10
Q4
Inverting Q4 Output. Typically terminate with 50
resistor to (VCC - 2V).
11
VEE
Negative Supply Voltage
12
SEL
Clock Select Input (Single Ended). Drive low to select the CLK, CLK input. Drive high to select the
SCLK input. The SEL threshold is equal to VBB. Internal 60k
pulldown to VEE.
13
VBB
Reference Output Voltage. Connect to the inverting or noninverting clock input to provide a
reference for single-ended operation. When used, bypass with a 0.01F ceramic capacitor to VCC;
otherwise, leave it unconnected.
14
CLK
Inverting Differential Clock Input. Internal 75k
pullup to VCC and 75k pulldown to VEE.
15
CLK
Noninverting Differential Clock Input. Internal 75k
pulldown to VEE.
16
SCLK
Single-Ended Clock Input. Internal 75k
pulldown to VEE.
17
NC
Not Internally Connected. Solder to PC board for package thermal dissipation.
18, 20
VCC
Positive Supply Voltage. Bypass VCC to VEE with 0.1F and 0.01F ceramic capacitors. Place the
capacitors as close to the device as possible with the smaller value capacitor closest to the device.
19
EN
Output Enable Input. Outputs are synchronously enabled on the falling edge of the clock input
when EN is low. Outputs are synchronously set to low on the falling edge of the clock input when
EN is high. Internal 60k
pulldown to VEE.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VI-2W1-MW-B1 | CONVERTER MOD DC/DC 12V 100W |
| VI-2WB-MW-B1 | CONVERTER MOD DC/DC 95V 100W |
| SY88147DLKG | IC POST AMP PECL 3.3V 10-MSOP |
| VI-2W4-MW-B1 | CONVERTER MOD DC/DC 48V 100W |
| VI-22X-MW-B1 | CONVERTER MOD DC/DC 5.2V 100W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9316EWP+ | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 LVPECL/LVECL/HSTL Clock & Data Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MAX9316EWP+T | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 LVPECL/LVECL/HSTL Clock & Data Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MAX9316EWP+TG48 | 制造商:Maxim Integrated Products 功能描述:MICRO SPRT 3.3V ECL/PECL 1:5 CLK DRVR - Tape and Reel |
| MAX9316EWP-T | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 LVPECL/LVECL/HSTL Clock & Data Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MAX9317AECJ | 功能描述:時(shí)鐘緩沖器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。