參數(shù)資料
型號(hào): MAX9313EHJ
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
中文描述: 9313 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
封裝: 5 X 5 MM, 1 MM HEIGHT, MO-136AA, TQFP-32
文件頁數(shù): 8/12頁
文件大?。?/td> 377K
代理商: MAX9313EHJ
M
1:10 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
8
_______________________________________________________________________________________
differential pair by matching the electrical length of the
traces.
Output Termination
Terminate outputs through 50
to V
CC
- 2V or use an
equivalent Thevenin termination. When a single-ended
signal is taken from a differential output, terminate both
outputs. For example, if Q0 is used as a single-ended
output, terminate both Q0 and
Q0
.
Chip Information
TRANSISTOR COUNT: 250
V
IL
V
IH
V
OH
-
V
OL
V
OH
V
OL
Q_
Q_
CLK_
CLK_
(CONNECTED TO
CLK_
)
V
BB
Figure 1. Switching with Single-Ended Input
0 (DIFFERENTIAL)
80%
20%
80%
20%
0 (DIFFERENTIAL)
V
OH
- V
OL
V
IHD
- V
ILD
V
IHD
V
ILD
Q_
Q_
(Q_) - (Q_)
CLK_
CLK_
t
PLHD
t
PHLD
t
R
t
F
V
OH
V
OL
Figure 2. Differential Transition Time and Propagation Delay Timing Diagram
相關(guān)PDF資料
PDF描述
MAX9313ECJ 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
MAX9311 Quadruple 2-Input Positive-NAND Gates 14-CDIP -55 to 125
MAX9311ECJ Quadruple 2-Input Positive-NAND Gates 20-LCCC -55 to 125
MAX9313 Quadruple 2-Input Positive-NAND Gates 14-CDIP -55 to 125
MAX9311EHJ 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
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