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參數(shù)資料
| 型號(hào)： | MAX9247 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | 27-Bit, 2.5MHz-to-42MHz DC-Balanced LVDS Serializer |
| 中文描述： | 27位、2.5MHz至42MHz、直流平衡、LVDS串行器 |
| 文件頁數(shù)： | 14/17頁 |
| 文件大?。?/td> | 330K |
| 代理商： | MAX9247 |
M
27-Bit, 2.5MHz-to-42MHz
DC-Balanced LVDS Serializer
14
______________________________________________________________________________________
Termination
The MAX9247 has an integrated 100
output-termina-
tion resistor. This resistor damps reflections from
induced noise and mismatches between the transmis-
sion line impedance and termination resistors at the
deserializer input. With
PWRDWN
= low or with the sup-
ply off, the output termination is switched out and the
LVDS output is high impedance.
Common-Mode Filter
The integrated 100
output termination is made up of
two 50
resistors in series. The junction of the resistors
is connected to the CMF pin for connecting an optional
common-mode filter capacitor. Connect the filter
capacitor to ground close to the MAX9247 as shown in
Figure 15. The capacitor shunts common-mode switch-
ing current to ground to reduce EMI.
LVDS Output Preemphasis (PRE)
The MAX9247 features a preemphasis mode where extra
current is added to the output and causes the ampli-
tude to increase by 40% to 50% at the transition point.
Preemphasis helps to get a faster transition, better eye
diagram, and improve signal integrity. See the
Typical
Operating Characteristics
. The additional current is
turned on for a short time (360ps, typ) during data transi-
tion, and then turned off. Enable preemphasis by driving
PRE high.
Power-Down and Power-Off
Driving
PWRDWN
low stops the PLL, switches out the
integrated 100
output termination, and puts the output
in high impedance to ground and differential. With
PWRDWN
≤
0.3V and all LVTTL/LVCMOS inputs
≤
0.3V or
≥
V
CCIN
- 0.3V, supply current is reduced to 50μA or less.
Driving
PWRDWN
high starts PLL lock to PCLK_IN and
switches in the 100
output termination resistor. The
LVDS output is not driven until the PLL locks. The LVDS
output is high impedance to ground and 100
differen-
tial. The 100
integrated termination pulls OUT+ and
OUT- together while the PLL is locking so that V
OD
= 0V.
If V
CC
= 0, the output resistor is switched out and the LVDS
outputs are high impedance to ground and differential.
PLL Lock Time
The PLL lock time is set by an internal counter. The lock
time is 17,100 PCLK_IN cycles. Power and clock should
be stable to meet the lock-time specification.
Input Buffer Supply
The single-ended inputs (RGB_IN[17:0], CNTL_IN[8:0],
DE_IN, RNG0, RNG1, PRE, PCLK_IN, and
PWRDWN
)
are powered from V
CCIN
. V
CCIN
can be connected to a
1.71V to 3.6V supply, allowing logic inputs with a nomi-
nal swing of V
CCIN
. If no power is applied to V
CCIN
when power is applied to V
CC
, the inputs are disabled
and
PWRDWN
is internally driven low, putting the
device in the power-down state.
Power-Supply Circuits and Bypassing
The MAX9247 has isolated on-chip power domains. The
digital core supply (V
CC
) and single-ended input supply
(V
CCIN
) are isolated but have a common ground (GND).
The PLL has separate power and ground (V
CCPLL
and
PLLGND) and the LVDS input also has separate power
and ground (V
CCLVDS
and LVDSGND). The grounds are
isolated by diode connections. Bypass each V
CC
, V
CCIN
,
V
CCPLL
, and V
CCLVDS
pin with high-frequency, surface-
mount ceramic 0.1μF and 0.001μF capacitors in parallel
as close to the device as possible, with the smallest value
capacitor closest to the supply pin.
AC-COUPLING CAPACITOR VALUE
vs. PARALLEL CLOCK FREQUENCY
PARALLEL CLOCK FREQUENCY (MHz)
C
21
24
27
33
36
39
30
120
80
60
40
20
100
140
0
18
42
FOUR CAPACITORS PER LINK
TWO CAPACITORS PER LINK
Figure 14. AC-Coupling Capacitor Values vs. Clock Frequency
of 18MHz to 42MHz
OUT+
R
O
/ 2
R
O
/ 2
CMF
OUT-
C
CMF
Figure 15. Common-Mode Filter Capacitor Connection
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9247_09 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:27-Bit, 2.5MHz-to-42MHz DC-Balanced LVDS Serializer |
| MAX9247_12 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:27-Bit, 2.5MHz-to-42MHz DC-Balanced LVDS Serializer |
| MAX9247ECM | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:27-Bit, 2.5MHz-to-42MHz DC-Balanced LVDS Serializer |
| MAX9247ECM/V | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:27-Bit, 2.5MHz-to-42MHz DC-Balanced LVDS Serializer |
| MAX9247ECM/V+ | 功能描述:串行器/解串器 - Serdes 27Bit 2.5-42MHz DC Blnc LVDS Serializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
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