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參數(shù)資料
| 型號： | MAX9246GUM+TD |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 14/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 21BIT DESERIALIZER 48-TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 功能： | 解串器 |
| 數(shù)據(jù)速率： | 306Mbps |
| 輸入類型： | LVDS |
| 輸出類型： | LVTTL，LVCMOS |
| 輸入數(shù)： | 3 |
| 輸出數(shù)： | 21 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TFSOP（0.240"，6.10mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-TSSOP |
| 包裝： | 帶卷 (TR) |
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
______________________________________________________________________________________
21
SSG and DCB provides the proper mid-level voltage
under conditions of low input current. The mid-level
input current must not be greater than ±10A, and the
mid-level logic state cannot be driven with an external
voltage source.
IEC 61000-4-2 Level 4 and ISO 10605
ESD Protection
The MAX9242/MAX9244/MAX9246/MAX9254 ESD toler-
ance is rated for Human Body Model, IEC 61000-4-2
and ISO 10605. The ISO 10605 and IEC 61000-4-2
standards specify ESD tolerance for electronic sys-
tems. All LVDS inputs on the MAX9242/MAX9244/
MAX9246/MAX9254 meet ISO 10605 ESD protection at
±30kV Air-Gap Discharge and ±6kV Contact Discharge
and IEC 61000-4-2 ESD protection at ±15kV Air-Gap
Discharge and ±8kV Contact Discharge. All other pins
meet the Human Body Model ESD tolerance of ±2.5kV.
The Human Body Model discharge components are CS
= 100pF and RD = 1.5k
Ω (Figure 21). The IEC 61000-4-
2 discharge components are CS = 150pF and RD =
330
Ω (see Figure 22). The ISO 10605 discharge com-
ponents are CS = 330pF and RD = 2k
Ω (Figure 23).
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
RD
1.5k
Ω
CS
100pF
Figure 21. Human Body ESD Test Circuit
CS
150pF
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
R2
330
Ω
Figure 22. IEC 61000-4-2 Contact Discharge ESD Test Circuit
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
RD
2k
Ω
CS
330pF
Figure 23. ISO 10605 Contact Discharge ESD Test Circuit
48
47
46
45
44
43
42
41
40
39
1
2
3
4
5
6
7
8
9
10
VCCO
RxOUT16
RxOUT15
RxOUT14
RxOUT19
GND
RxOUT18
RxOUT17
TOP VIEW
MAX9242
MAX9244
MAX9246
MAX9254
GND
RxOUT13
VCC
RxOUT12
RxIN0-
DCB
SSG
RxOUT20
RxOUT11
RxOUT10
RxIN1-
RxIN0+
38
37
36
35
34
33
32
31
30
29
GND
RxOUT9
VCCO
RxOUT8
RxOUT7
RxOUT6
GND
RxOUT5
RxOUT4
RxOUT3
11
12
13
14
15
16
17
18
19
RxIN2-
LVDSGND
LVDSVCC
RxIN1+
LVDSGND
RxCLKIN+
RxCLKIN-
RxIN2+
PLLVCC
PLLGND
TSSOP
20
21
RxOUT0
24
28
25
VCCO
22
27
23
RxCLKOUT
26
RxOUT1
RxOUT2
GND
PWRDWN
Pin Configuration
Chip Information
PROCESS: CMOS
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