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參數(shù)資料
| 型號(hào)： | MAX9208EAI+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DESERIALIZER LVDS 28-SSOP |
| 其它有關(guān)文件： | Automotive Product Guide |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 功能： | 解串器 |
| 數(shù)據(jù)速率： | 660Mbps |
| 輸入類型： | LVDS |
| 輸出類型： | LVTTL，LVCMOS |
| 輸入數(shù)： | 1 |
| 輸出數(shù)： | 10 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SSOP |
| 包裝： | 帶卷 (TR) |
MAX9206/MAX9208
10-Bit Bus LVDS Deserializers
______________________________________________________________________________________
11
Topologies
The MAX9206/MAX9208 deserializers can operate in a
variety of topologies. Examples of double-terminated
point-to-point and point-to-point broadcast are shown
in Figures 10 and 11. Use 1% surface-mount termina-
tion resistors.
A point-to-point interface terminated at each end in the
characteristic impedance of the cable or PCB traces is
shown in Figure 10. The total load seen by the serializer
is 50
Ω. The double termination typically reduces reflec-
tions compared to a single 100
Ω termination. A single
100
Ω termination at the deserializer input is feasible
and makes the differential signal swing larger.
A point-to-point version of a multidrop bus is shown in
Figure 11. The low-jitter MAX9150 10-port repeater is
used to reproduce and transmit the serializer output
over 10 double-terminated point-to-point links.
Compared to a bus, more interconnect is traded for
robust hot-plug capability.
The repeater eliminates nine serializers compared to 10
individual point-to-point serializer-to-deserializer con-
nections. Since repeater jitter is a component of the
total jitter seen at the deserializer input (along with
other sources of jitter), a low-jitter repeater is essential
in most high data-rate applications.
Board Layout
A four-layer PCB providing separate power, ground,
and signal layers is recommended. Keep the
LVTTL/LVCMOS inputs and outputs separated from the
BLVDS inputs to prevent coupling into the BLVDS lines.
Chip Information
PROCESS: CMOS
LOGIC INPUTS
REN
PWRDN
CONDITIONS
OUTPUTS
X
Low
Power applied and stable
Power-down mode. PLL is stopped. Current consumption is reduced
to 400μA (typ). ROUT_, RCLK, and
LOCK are high impedance.
Low
High
Deserializer initialized
RCLK and ROUT_ are high impedance.
LOCK is active, indicating
the serial input status.
High
Deserializer initialized
RCLK and ROUT_ are active.
LOCK is active, indicating the serial
input status.
Table 2. Input/Output Function Table
X = Don’t care.
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
ROUT0
ROUT1
ROUT2
ROUT3
ROUT4
DVCC
ROUT9
DGND
DVCC
DGND
ROUT5
ROUT6
ROUT7
ROUT8
DGND
AGND
AVCC
LOCK
RCLK
REN
PWRDN
RI-
RI+
AVCC
REFCLK
RCLK_R/F
AGND
SSOP
TOP VIEW
MAX9206/
MAX9208
+
Pin Configuration
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
28 SSOP
A28+4
Package Information
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
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| MAX9206EAI/V+T | IC DESERIALIZER LVDS 28-SSOP |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9209 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Programmable DC-Balanced 21-Bit Serializers |
| MAX9209_07 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Programmable DC-Balanced 21-Bit Serializers |
| MAX9209_0710 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Programmable DC-Balanced 21-Bit Serializers |
| MAX9209_12 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Programmable DC-Balanced 21-Bit Serializers |
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