參數(shù)資料
型號(hào): MAX9160AEUI
廠(chǎng)商: MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi): 時(shí)鐘及定時(shí)
英文描述: RES 0.3-OHM 1% 1W 200PPM THK-FILM SMD-2512 TR-7-PL
中文描述: LOW SKEW CLOCK DRIVER, 14 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
封裝: 4.40 MM, EXPOSED PAD, TSSOP-28
文件頁(yè)數(shù): 7/13頁(yè)
文件大?。?/td> 348K
代理商: MAX9160AEUI
Detailed Description
The MAX9160 125MHz, 14-port LVTTL/LVCMOS clock
driver repeats the selected LVDS or LVTTL/LVCMOS
input on two output banks. Each bank consists of seven
LVTTL/LVCMOS series terminated outputs and a bank
enable. The LVDS input has a fail-safe function. The
MAX9160 has a propagation delay that can be adjusted
using an external resistor to set the bias current for an
internal delay cell. The LVTTL/LVCMOS outputs feature
200ps maximum output-to-output skew and ±100ps
maximum added peak-to-peak jitter.
The MAX9160 is designed to operate with a 3.3V sup-
ply voltage over the extended temperature range of
-40
°
C to +85
°
C. This device is available in 28-pin
exposed and nonexposed pad TSSOP and 32-lead
5mm x 5mm QFN packages.
Fail-Safe
A fail-safe circuit on the MAX9160 sets enabled outputs
high when the LVDS input is:
Open
Undriven and shorted
Undriven and terminated
Without a fail-safe circuit, when the LVDS input is
selected and undriven, noise may cause the enabled
outputs to switch. Open or undriven terminated input
conditions can occur when a cable is disconnected or
cut, or when a driver output is in high impedance. A
shorted input can occur because of a cable failure.
When the MAX9160 LVDS input is driven with a differ-
ential signal with a common-mode voltage between
IV
ID
/2I and 2.4V - IV
ID
/2I, the fail-safe circuit is not acti-
vated. If the input is open, undriven and shorted, or
undriven and parallel terminated, an internal resistor in
the fail-safe circuit pulls both of the LVDS inputs above
V
CC
- 0.3V, activating the fail-safe circuit and forcing
the output high (
Figure 1).
M
LVDS or LVTTL/LVCMOS Input to
14 LVTTL/LVCMOS Output Clock Driver
_______________________________________________________________________________________
7
Pin Description (continued)
PIN
QFN
TSSOP
NAME
FUNCTION
21, 23, 24, 26,
27, 30, 31
1, 2, 22, 24, 25,
27, 28
OUTA_
Bank A LVCMOS/LVTTL Outputs
32
3
ENA
LVCMOS/LVTTL Level Logic Input. When ENA = high, outputs OUTA_ are
enabled and follow the selected input. When ENA = low or open, outputs
OUTA_ are driven low. ENA is pulled to GND by an internal resistor.
EP*
Exposed
Pad
Solder to PC board
*
MAX9160EGJ and MAX9160AEUI.
V
CC
- 0.3V
V
CC
R
IN2
R
IN1
IN+
FAIL-SAFE
COMPARATOR
TO INPUT
MUX
IN-
R
IN1
C
L
OUT_
Figure 1. Fail-Safe Input Circuit
Figure 2. Output Load
相關(guān)PDF資料
PDF描述
MAX9160EUI LVDS or LVTTL/LVCMOS Input to 14 LVTTL/LVCMOS Output Clock Driver
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX9160EUI 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 LVDS or LVTTL/LVCMOS Input to 14 LVTTL/LVCMOS Output Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類(lèi)型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
MAX9160EUI+ 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 LVDS or LVTTL/LVCMOS Input to 14 LVTTL/LVCMOS Output Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類(lèi)型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
MAX9160EUI+T 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類(lèi)型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
MAX9160EUI-T 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 LVDS or LVTTL/LVCMOS Input to 14 LVTTL/LVCMOS Output Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類(lèi)型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
MAX9163 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Bus LVDS 3.3V Single Transceiver