
M
Low-Jitter, 10-Port LVDS Repeater
8
_______________________________________________________________________________________
Test Circuits and Timing Diagrams (continued)
Figure 3. Propagation Delay and Transition Time Waveforms
R
IN-
R
IN+
t
PHLD
V
CM
V
DIFF
= (V
DO_+
) - (V
DO_-
)
t
THL
20%
80%
80%
50%
O
O
50%
t
TLH
20%
DIFFERENTIAL
0
t
PLHD
V
ID
V
CM
Figure 2. Repeater Propagation Delay and Transition Time Test Circuit
DO1+
DO10+
RL
50
RL
50
DO10-
DO1-
RIN+
RIN-
GENERATOR
50
50
C
L
5pF
C
L
5pF
C
L
5pF
C
L
5pF
MAX9150