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參數資料
| 型號： | MAX9144EUD+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數： | 9/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC COMPARATOR R-R 14TSSOP |
| 其它有關文件： | Automotive Product Guide |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 類型： | 通用 |
| 元件數： | 4 |
| 輸出類型： | CMOS，推挽式，TTL |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 5.5 V |
| 電壓 - 輸入偏移（最小值）： | 2mV @ 5V |
| 電流 - 輸入偏壓（最小值）： | 0.32µA @ 5V |
| 電流 - 靜態(tài)（最大值）： | 300µA |
| CMRR, PSRR（標準）： | 81.94dB CMRR，81.94dB PSRR |
| 傳輸延遲（最大）： | 40ns |
| 磁滯： | 1.5mV |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 安裝類型： | 表面貼裝 |
| 包裝： | 帶卷 (TR) |
MAX9140/MAX9141/MAX9142/MAX9144
40ns, Low-Power, 3V/5V, Rail-to-Rail
Single-Supply Comparators
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 5V, VCM = 0V, SHDN = LE = VCC (MAX9141 only), CL = 15pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are
at TA = +25°C.) (Note 1)
Note 1:
All devices are 100% production tested at TA = +25°C. Specifications over temperature are guaranteed by design.
Note 2:
Inferred from PSRR test.
Note 3:
Inferred from CMRR test. Note also that either or both inputs can be driven to the absolute maximum limit (0.3V beyond either
supply rail) without damage or false output inversion.
Note 4:
VOS is defined as the center of the input-referred hysteresis zone. See Figure 1.
Note 5:
The input-referred trip points are the extremities of the differential input voltage required to make the comparator output
change state. The difference between the upper and lower trip points is equal to the width of the input-referred hysteresis
zone. See Figure 1.
Note 6:
The polarity of IB reverses direction as VCM approaches either supply rail.
Note 7:
Specified over the full common-mode voltage range (VCMR).
Note 8:
Specification is for current flowing into or out of the output pin for VOUT driven to any voltage from VCC to GND while the part is
in shutdown.
Note 9:
Specified between any two channels in the MAX9142/MAX9144.
Note 10:
Specified as the difference between tPD+ and tPD- for any one comparator.
Note 11:
Applies to the MAX9141 only for both SHDN and LE.
Note 12:
Applies to the MAX9141 only. Comparator is active with LE driven high and is latched with LE driven low (VOD = 10mV). See
Figure 2.
Note 13:
Applicable to the MAX9141 only. Comparator is active with the SHDN driven high and is shutdown with SHDN driven low.
Shutdown enable time is the delay when the SHDN is driven high to the time the output is valid. Shutdown disable time is the
delay when the SHDN is driven low to the time the comparator shuts down.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX9141
165
275
MAX9140,
TA = -40°C to +85°C
150
250
MAX9140AA_ _
360
VCM = VCC = 3V
MAX9142/MAX9144
150
250
MAX9141
200
320
MAX9140,
TA = -40°C to +85°C
165
300
MAX9140AA_ _
400
VCM = VCC = 5V
MAX9142/MAX9144
165
300
Supply Current (Per Comparator)
ICC
MAX9141 only, SHDN = GND;
VCC = VCM = 3V
12
30
A
Propagation Delay
tPD+,
tPD-
VCC = 3V, VOD = 10mV
40
ns
Differential Propagation Delay
dtPD
VOD = 10mV (Note 9)
2
ns
Propagation Delay Skew
VOD = 10mV (Note 10)
2
ns
Logic Input-Voltage High
VIH
(Note 11)
(VCC/2)
+0.4
VCC/2
V
Logic Input-Voltage Low
VIL
(Note 11)
VCC/2
(VCC/2)
-0.4
V
Logic Input Current
IIL, IIH
VLOGIC = 0 to VCC (Note 11)
2
10
A
Data-to-Latch Setup Time
tS
(Note 12)
16
ns
Latch-to-Data Hold Time
tH
(Note 12)
16
ns
Latch Pulse Width
tLPW
(Note 12)
45
ns
Latch Propagation Delay
tLPD
(Note 12)
60
ns
Shutdown Enable Time
(Note 13)
1
s
Shutdown Disable Time
(Note 13)
5
s
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