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參數(shù)資料
| 型號(hào)： | MAX9109EXT-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類(lèi)： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | 25ns, Dual/Quad/Single, Low-Power, TTL Comparators |
| 中文描述： | COMPARATOR, 4000 uV OFFSET-MAX, 25 ns RESPONSE TIME, PDSO6 |
| 封裝： | SC-70, 6 PIN |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大?。?/td> | 313K |
| 代理商： | MAX9109EXT-T |
M
25ns, Dual/Quad/Single, Low-Power,
TTL Comparators
______________________________________________________________Pin Description
6
_______________________________________________________________________________________
_______________Detailed Description
Timing
Noise or undesired parasitic AC feedback cause most
high-speed comparators to oscillate in the linear region
(i.e., when the voltage on one input is at or near the
voltage on the other input). The MAX9107/MAX9108/
MAX9109 eliminate this problem by incorporating an
internal hysteresis of 2mV. When the two comparator
input voltages are equal, hysteresis effectively causes
one comparator input voltage to move quickly past the
other, thus taking the input out of the region where
oscillation occurs. Standard comparators require that
hysteresis be added through the use of external resis-
tors. The MAX9107/MAX9108/MAX9109’s fixed internal
hysteresis eliminates these resistors. To increase hys-
teresis and noise margin even more, add positive feed-
back with two resistors as a voltage divider from the
output to the noninverting input.
Adding hysteresis to a comparator creates two trip
points: one for the input voltage rising and one for the
input voltage falling (Figure 1). The difference between
these two input-referred trip points is the hysteresis.
The average of the trip points is the offset voltage.
Figure 1 illustrates the case where IN- is fixed and IN+
is varied. If the inputs were reversed, the figure would
look the same, except the output would be inverted.
The MAX9109 includes an internal latch, allowing the
result of a comparison to be stored. If LE is low, the
latch is transparent (i.e., the comparator operates as
though the latch is not present). The state of the com-
parator output is latched when LE is high (Figure 2).
Applications Information
Circuit Layout
Because of the MAX9107/MAX9108/MAX9109’s high
gain bandwidth, special precautions must be taken to
realize the full high-speed capability. A printed circuit
board with a good, low-inductance ground plane is
mandatory. Place the decoupling capacitor (a 0.1μF
ceramic capacitor is a good choice) as close to V
CC
as
PIN
MAX9109
MAX9107
MAX9108
SC70/SOT23
SO
NAME
FUNCTION
1
2
3
7
6
5
—
—
—
—
—
—
—
—
—
8
4
—
—
1
2
3
7
6
5
8
9
10
14
13
12
—
—
—
4
11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
3
4
6
2
5
—
—
—
—
—
—
—
—
—
—
—
—
—
7
2
3
1
6
5
4, 8
OUTA
INA-
INA+
OUTB
INB-
INB+
OUTC
INC-
INC+
OUTD
IND-
IND+
OUT
IN+
IN-
V
CC
GND
LE
N.C.
Channel A Output
Channel A Inverting Input
Channel A Noninverting Input
Channel B Output
Channel B Inverting Input
Channel B Noninverting Input
Channel C Output
Channel C Inverting Input
Channel C Noninverting Input
Channel D Output
Channel D Inverting Input
Channel D Noninverting Input
Output
Noninverting Input
Inverting Input
Positive Supply
Ground
Latch E nab e. The l atch i s tr ansp ar ent w hen LE i s l ow
No Connection. Not internally connected.
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