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參數(shù)資料
| 型號： | MAX8533EVKIT |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Evaluation Kit for the MAX8533 |
| 中文描述： | MAX8533評估板 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 296K |
| 代理商： | MAX8533EVKIT |
M
PWM Buc k Converters with Bypass FET
for N-CDMA/W-CDMA Handsets
10
______________________________________________________________________________________
High-Power Bypass Mode (MAX 8504)
A high-power bypass mode is available on the
MAX8504 for use when a PA transmits at high power.
This mode connects OUT to BATT through the bypass
PFET. Additionally, the PWM buck converter is forced
into 100% duty cycle to further reduce dropout.
S hutdown Mode
Driving
SHDN
to GND places the MAX8500
–
MAX8504 in
shutdown mode. In shutdown, the reference, control cir-
cuitry, internal switching MOSFET, and synchronous rec-
tifier turn off and the output becomes high impedance.
Input current falls to 0.1μA (typ) during shutdown mode.
Drive
SHDN
high for normal operation.
Current-S ense Comparators
The MAX8500
–
MAX8504 use several internal current-
sense comparators. In PWM operation, the PWM com-
parator terminates the cycle-by-cycle on-time and
provides improved load and line response. A second
current-sense comparator used across the P-channel
switch controls entry into skip mode. A third current-
sense comparator monitors current through the internal
N-channel MOSFET to prevent excessive reverse cur-
rents and determine when to turn off the synchronous
rectifier. A fourth comparator used at the P-channel
MOSFET detects overcurrent. A fifth comparator used
at the bypass/LDO P-channel MOSFET detects over-
current in the HP mode or at dropout. This protects the
system, external components, and internal MOSFETs
under overload conditions.
Applic ations Information
S etting the Output V oltage
Using a DAC (MAX8500–MAX8503)
The MAX8500
–
MAX8503 are optimized for highest sys-
tem efficiency when applying power to a linear PA in
CDMA handsets. When transmitting at less than full
power, the supply voltage to the PA is lowered from
V
BATT
to as low as 0.4V to greatly reduce battery cur-
rent. Figure 3 shows the typical CDMA PA load profile.
The use of DC-to-DC converters such as the MAX8500
–
MAX8503 dramatically extends talk time in these appli-
cations.
The MAX8500
–
MAX8503s
’
output voltage is dynamically
adjustable from 0.4V to V
BATT
by the use of the REFIN
input. The gain from V
REFIN
to V
OUT
is internally set to
1.76X (MAX8500 and MAX8502) or 2X (MAX8501 and
MAX8503). V
OUT
can be adjusted during operation by
driving REFIN with an external DAC. The MAX8500
–
MAX8503 output responds to full-scale change in voltage
and current in <30μs.
Using External Divider (MAX8504)
The MAX8504 is intended for two-step V
CC
control
applications where high efficiency is a priority. Select
an output voltage between 1.25V and V
BATT
by con-
necting FB to a resistive divider between the output
and GND (Figure 4). Select feedback resistor R2 in the
5k
to 50k
range. R1 is then given by:
where V
FB
= 1.25V.
R
-1
1
2
=
×
R
V
V
OUT
FB
30
0
600
W-CDMA PA SUPPLY CURRENT (mA)
300
0.4
0
1.0
3.0
3.4
W
Figure 3. Typical W-CDMA Power Amplifier Load Profile
R1
R2
50k
MAX8504
LX
FB
Figure 4. Setting the Adjustable Output Voltage
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