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參數(shù)資料
| 型號： | MAX823ZEXK-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | Analog IC |
| 中文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO5 |
| 封裝： | SC-70, 5 PIN |
| 文件頁數(shù)： | 10/16頁 |
| 文件大小： | 272K |
| 代理商： | MAX823ZEXK-T |
M
Microprocessor and Nonvolatile
Memory Supervisory Circuits
10
______________________________________________________________________________________
Low-Line Output
In internal threshold mode, the low-line comparator
monitors V
CC
with a threshold voltage typically 120mV
above the reset threshold, and with 15mV of hysteresis.
For normal operation (V
CC
above the reset threshold),
LOWLINE
is pulled to V
CC
. Use
LOWLINE
to provide an NMI
to the μP, as described in the previous section, when
V
CC
begins to fall (Figure 4).
Reset Function
The MAX792/MAX820 provide both RESET and
RESET
outputs. The RESET and
RESET
outputs ensure that the
μP powers up in a known state, and prevent code-exe-
cution errors during power-up, power-down, or
brownout conditions.
The reset function will be asserted during the following
conditions:
1) V
CC
less than the programmed reset threshold.
2)
MR
less than 1.30V typ.
3) Reset remains asserted for 200ms typ after V
CC
rises above the reset threshold or after
MR
has
exceeded 1.30V typ.
When reset is asserted, all the internal counters are
reset, the watchdog output (
WDO
)
and watchdog-pulse
output
(
WDPO
)
are set high, and the set watchdog-time-
out input (SWT) is set to (V
CC
- 0.6V) if it is not already
connected to V
CC
(for internal timeouts). The chip-
enable transmission gate is also disabled while reset is
asserted; the chip-enable input (
CE
IN) becomes high
impedance and the chip-enable output (
CE
OUT) is
pulled up to V
CC
.
MR
RESET
CE IN OV
CE OUT
25
μ
s MIN
12
μ
s TYP
15
μ
s TYP
Figure 2. Manual-Reset Timing Diagram
MAX792
MAX820
MANUAL RESET
OTHER
RESET
SOURCES
9
MR
*
*
*
.
DIODES NOT REQUIRED ON OPEN-DRAIN OUTPUTS
Figure 3. Diode "OR" connections allow multiple reset sources
to connect to
MR
.
MAX792
12
GND
3
V
CC
LLIN/REFOUT
RESET
RESET
LOW LINE
RESET IN/INT
4
5
2
10
1
TO
μ
P
TO
μ
P
TO
μ
P NMI
V
IN
Figure 4a. Connection for Internal Threshold Mode
MAX792
GND
V
CC
TO
μ
P
TO
μ
P
TO
μ
P NMI
2
1
10
RESET IN/INT
LLIN/REFOUT
RESET
RESET
LOW LINE
12
V
IN
R3 = 1.30V x V
CC
MAX
V
LOW LINE
x I
MAX
R2 = 1.30V x V
CC
MAX
V
RESET
x I
MAX
–
R3
R1 = V
CC
MAX
I
MAX
–
(R2 + R3)
I
MAX
= THE MAXIMUM DESIRED CURRENT
THROUGH THE VOLTAGE DIVIDED.
3
R3
R2
R1
Figure 4b. Connection for External Threshold Programming Mode
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