參數(shù)資料
型號(hào): MAX819MESA
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 電源管理
英文描述: +5V Microprocessor Supervisory Circuits
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封裝: 0.150 INCH, SOIC-8
文件頁數(shù): 15/16頁
文件大?。?/td> 114K
代理商: MAX819MESA
M
+5V Mic roproc essor S upervisory Circ uits
______________________________________________________________________________________
15
____Pin Configurations (c ontinued)
__________Typic al Operating Circ uit
WDI
GND
CE OUT
CE IN
1
2
8
7
BATT
RESET
V
CC
OUT
MAX818
DIP/SO/
μ
MAX
TOP VIEW
3
4
6
5
MR
GND
PFO
PFI
1
2
8
7
BATT
RESET
V
CC
OUT
MAX819
DIP/SO/
μ
MAX
3
4
6
5
CE IN*
*CE IN AND CE OUT APPLY TOMAX818 ONLY.
**WDI APPLIES TOMAX817/MAX818 ONLY.
BATT
RESET
I/O
OUT
CMOS
RAM
RESET
WDI**
CE OUT*
GND
0.1
μ
F
0.1
μ
F
0.1
μ
F
MAX817
MAX818
MAX819
V
CC
ADDRESS
DECODE
REAL-
TIME
CLOCK
A0–A15
μ
P
+5V
Watc hdog S oftware Considerations
(MAX 817/MAX 818)
To help the watchdog timer monitor software execution
more closely, set and reset the watchdog input at different
points in the program, rather than “pulsing” the watchdog
input high-low-high or low-high-low. This technique avoids
a “stuck” loop, in which the watchdog timer would contin-
ue to be reset within the loop, keeping the watchdog from
timing out. Figure 15 shows an example of a flow diagram
where the I/O driving the watchdog input is set high at the
beginning of the program, set low at the beginning of
every subroutine or loop, then set high again when the
program returns to the beginning. If the program should
“hang” in any subroutine, the problem would quickly be
corrected, since the I/O is continually set low and the
watchdog timer is allowed to time out, triggering a reset or
an interrupt. As described in the Watchdog Input Current
section, this scheme results in higher average WDI input
current than does the method of leaving WDI low for the
majority of the timeout period and periodically pulsing it
low-high-low.
Figure 15. Watchdog Flow Diagram
START
SET
WDI
LOW
SUBROUTINE
OR PROGRAM LOOP,
SET WDI
HIGH
RETURN
END
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