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      參數(shù)資料
      型號: MAX818L
      廠商: Maxim Integrated Products, Inc.
      英文描述: Dual 4-Input Positive-NAND Gates 14-CFP
      中文描述: +5V微處理器監(jiān)控電路
      文件頁數(shù): 7/16頁
      文件大?。?/td> 114K
      代理商: MAX818L
      M
      +5V Mic roproc essor S upervisory Circ uits
      _______________________________________________________________________________________
      7
      ______________________________________________________________Pin Desc ription
      Ground. 0V reference for all signals.
      3
      3
      Input Supply Voltage, +5V input.
      2
      2
      Supply Output for CMOS RAM. When V
      CC
      rises above the reset threshold
      or above V
      BATT
      , OUT is connected to V
      CC
      through an internal P-channel
      MOSFET switch. When V
      CC
      falls below V
      BATT
      , BATT connects to OUT.
      1
      1
      GND
      3
      V
      CC
      2
      OUT
      1
      Power-Fail Comparator Output. When PFI is less than V
      PFT
      or when V
      CC
      is
      below V
      BATT
      ,
      PFO
      goes low; otherwise
      PFO
      remains high.
      PFO
      is also used to
      enable the battery freshness seal (see Battery Freshness Seal and Power-Fail
      Comparatorsections).
      5
      Chip-Enable Input. The input to the chip-enable gating circuit. Connect to
      ground if unused.
      4
      Power-Fail Comparator Input. When V
      PFI
      is below V
      PFT
      or when V
      CC
      is below
      V
      BATT
      ,
      PFO
      goes low; otherwise,
      PFO
      remains high (see Power-Fail Comparator
      section). Connect to ground if unused.
      4
      PFO
      5
      CE
      IN
      PFI
      4
      Backup-Battery Input. When V
      CC
      falls below V
      BATT
      , OUT switches from V
      CC
      to
      BATT. When V
      CC
      rises above V
      BATT
      , OUT reconnects to V
      CC
      .
      8
      8
      Active-Low Reset Output. Pulses low for 200ms when triggered and remains
      low whenever V
      CC
      is below the reset threshold or when
      MR
      is a logic low. It
      remains low for 200ms after V
      CC
      rises above the reset threshold, the watchdog
      triggers a reset, or
      MR
      goes low to high.
      7
      7
      BATT
      8
      RESET
      7
      Manual Reset Input. A logic low on
      MR
      asserts reset. Reset remains asserted
      for as long as
      MR
      is held low and for 200ms after
      MR
      returns high. The active-
      low input has an internal 63k
      pull-up resistor. It can be driven from a TTL- or
      CMOS-logic line or shorted to ground with a switch. Leave open, or connect to
      V
      CC
      if unused.
      Watchdog Input. If WDI remains either high or low for longer than the watch-
      dog timeout period, the internal watchdog timer runs out and a reset is trig-
      gered. If WDI is left unconnected or is connected to a high-impedance
      three-state buffer, the watchdog feature is disabled. The internal watchdog
      timer clears whenever reset is asserted, WDI is three-stated, or WDI sees a ris-
      ing or falling edge. The WDI input is designed to be driven by a three-stated-
      output device with a maximum high-impedance leakage current of 10μA and a
      maximum output capacitance of 200pF. The output device must also be capa-
      ble of sinking and sourcing 200μA when active.
      6
      6
      Chip-Enable Output.
      CE
      OUT goes low only if
      CE
      IN is low while reset is not
      asserted. If
      CE
      IN is low when reset is asserted,
      CE
      OUT will remain low for
      15μs or until
      CE
      IN goes high, whichever occurs first.
      CE
      OUT is pulled up to
      OUT in battery-backup mode.
      CE
      OUT is also used to enable the battery
      freshness seal (see Battery Freshness Seal section).
      5
      MR
      6
      WDI
      CE
      OUT
      FUNCTION
      NAME
      MAX817
      MAX818
      MAX819
      PIN
      相關(guān)PDF資料
      PDF描述
      MAX818LCPA +5V Microprocessor Supervisory Circuits
      MAX818LCSA +5V Microprocessor Supervisory Circuits
      MAX818LESA Dual 4-Input Positive-AND Gates 14-CDIP -55 to 125
      MAX818M Dual 4-Input Positive-AND Gates 20-LCCC -55 to 125
      MAX818MCSA Dual 4-Input Positive-AND Gates 14-CDIP -55 to 125
      相關(guān)代理商/技術(shù)參數(shù)
      參數(shù)描述
      MAX818LCPA 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
      MAX818LCPA+ 功能描述:監(jiān)控電路 5V MPU Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
      MAX818LCSA 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
      MAX818LCSA+ 功能描述:監(jiān)控電路 5V MPU Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
      MAX818LCSA+T 功能描述:監(jiān)控電路 5V MPU Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel