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MAX809 Series, MAX810 Series
http://onsemi.com
7
APPLICATIONS INFORMATION
V
CC
Transient Rejection
The MAX809 provides accurate V
CC
monitoring and
reset timing during powerup, powerdown, and
brownout/sag conditions, and rejects negativegoing
transients (glitches) on the power supply line. Figure 13
shows the maximum transient duration vs. maximum
negative excursion (overdrive) for glitch rejection. Any
combination of duration and overdrive which lies
under
the
curve will
not
generate a reset signal. Combinations above
the curve are detected as a brownout or powerdown.
Typically, transient that goes 100 mV below the reset
threshold and lasts 5.0 s or less will not cause a reset pulse.
Transient immunity can be improved by adding a capacitor
in close proximity to the V
CC
pin of the MAX809.
Figure 13. Maximum Transient Duration vs.
Overdrive for Glitch Rejection at 25
°
C
Duration
V
TH
Overdrive
V
CC
10
250
200
110
60
RESET COMPARATOR OVERDRIVE (mV)
M
50
300
0
410
V
TH
= 4.9 V
150
100
V
TH
= 1.2 V
160
210
260
310
360
V
TH
= 2.93 V
RESET Signal Integrity During PowerDown
The MAX809 RESET output is valid to V
CC
= 1.0 V.
Below this voltage the output becomes an “open circuit” and
does not sink current. This means CMOS logic inputs to the
Microprocessor will be floating at an undetermined voltage.
Most digital systems are completely shutdown well above
this voltage. However, in situations where RESET must be
maintained valid to V
CC
= 0 V, a pulldown resistor must be
connected from RESET to ground to discharge stray
capacitances and hold the output low (Figure 14). This
resistor value, though not critical, should be chosen such that
it does not appreciably load RESET under normal operation
(100 k will be suitable for most applications).
V
CC
V
CC
RESET
RESET
R1
100 k
MAX809/810
GND
Figure 14. Ensuring RESET Valid to V
CC
= 0 V
Processors With Bidirectional I/O Pins
Some Microprocessor’s have bidirectional reset pins.
Depending on the current drive capability of the processor
pin, an indeterminate logic level may result if there is a logic
conflict. This can be avoided by adding a 4.7 k resistor in
series with the output of the MAX809 (Figure 15). If there
are other components in the system which require a reset
signal, they should be buffered so as not to load the reset line.
If the other components are required to follow the reset I/O
of the Microprocessor, the buffer should be connected as
shown with the solid line.
V
CC
V
CC
Microprocessor
RESET
RESET
MAX809/810
GND
GND
4.7 k
Figure 15. Interfacing to Bidirectional Reset I/O
RESET
V
CC
BUFFERED RESET
TO OTHER SYSTEM
COMPONENTS
BUFFER