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參數(shù)資料
| 型號： | MAX808_EPA |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | 8-Pin レP Supervisory Circuits with 【1.5eset Accuracy |
| 中文描述： | 8引腳レP監(jiān)控電路與精度【1.5eset |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 91K |
| 代理商： | MAX808_EPA |
M
MAX 801 Watc hdog T imer
The watchdog monitors the μP’s activity. If the μP does
not toggle the watchdog input (WDI) within 1.6sec,
reset asserts for the reset timeout period. The internal
1.6sec timer is cleared when reset asserts or when a
transition (low-to-high or high-to-low) occurs at WDI
while reset is not asserted. The timer remains cleared
and does not count as long as reset is asserted. It
starts counting as soon as reset is released (Figure 5).
Supply current is typically reduced by 10μA when WDI
is at a valid logic level. To disable the watchdog func-
tion, leave WDI unconnected. An internal voltage
divider sets WDI to about mid-supply, disabling the
watchdog timer/counter.
MAX 808 Chip-Enable Gating
The MAX808 provides internal gating of chip-enable
(CE) signals to prevent erroneous data from corrupting
CMOS RAM in the event of a power failure. During nor-
mal operation, the CE gate is enabled and passes all
CE transitions. When reset is asserted, this path
becomes disabled, preventing erroneous data from
corrupting the CMOS RAM. The MAX808 uses a series
transmission gate from the chip-enable input (
CE
IN) to
the chip-enable output (
CE
OUT) (Figure 1). The 8ns
max chip-enable propagation from
CE
IN to
CE
OUT
enables the MAX808 to be used with most μPs.
The MAX808 also features write-cycle-completion cir-
cuitry. If V
CC
falls below the reset threshold while the
μP is writing to RAM, the MAX808 holds the CE gate
enabled for 18μs to allow the μP to complete the write
instruction. If the write cycle has not completed by the
end of the 18μs period, the CE transmission gate turns
off and
CE
OUT goes high. If the μP completes the
write instruction during the 18μs period, the CE gate
turns off (high impedance) and
CE
OUT goes high as
soon as the μP pulls
CE
IN high.
CE
OUT remains high,
even if
CE
IN falls low for any reason (Figure 6).
Chip-Enable Input
CE
IN is high impedance (disabled mode) while reset is
asserted. During a power-down sequence when V
CC
passes the reset threshold, the CE transmission gate
disables.
CE
IN becomes high impedance 18μs after
reset asserts, provided
CE
IN is still low. If the μP com-
pletes the write instruction during the 18μs period, the
CE gate turns off.
CE
IN becomes high impedance as
soon as the μP pulls
CE
IN high.
CE
IN remains high
impedance even if the signal at
CE
IN falls low (Figure
6). During a power-up sequence,
CE
IN remains high
impedance (regardless of
CE
IN activity) until reset is
deasserted following the reset timeout period.
In high-impedance mode, the leakage currents into this
input are ±1μA max over temperature. In low-imped-
ance mode, the impedance of
CE
IN appears as a 75
resistor in series with the load at
CE
OUT.
The propagation delay through the CE transmission
gate depends on both the source impedance of the
drive to
CE
IN and the capacitive loading on
CE
OUT
(see the Chip-Enable Propagation Delay vs.
CE
OUT
Load Capacitance graph in the Typical Operating
Characteristics). The CE propagation delay is produc-
tion tested from the 50% point on
CE
IN to the 50%
point on
CE
OUT using a 50
driver and 50pF of load
capacitance (Figure 7). For minimum propagation
delay, minimize the capacitive load at
CE
OUT and use
a low-output-impedance driver.
8-Pin μP S upervisory Circ uits
with ±1.5% Reset Ac c urac y
10
______________________________________________________________________________________
V
CC
RESET
WDI
t
RP
t
RP
t
WD
Figure 5. Watchdog Timing
V
CC
CE IN
RESET
THRESHOLD
CE OUT
RESET
17
μ
s
18
μ
s
17
μ
s
18
μ
s
Figure 6. Chip-Enable Timing
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX808_ESA | 8-Pin レP Supervisory Circuits with 【1.5eset Accuracy |
| MAX808_MJA | 8-Pin レP Supervisory Circuits with 【1.5eset Accuracy |
| MAX801 | 8-Pin レP Supervisory Circuits with 【1.5eset Accuracy |
| MAX801L | 8-Pin レP Supervisory Circuits with 【1.5eset Accuracy |
| MAX801_CPA | 8-Pin レP Supervisory Circuits with 【1.5eset Accuracy |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX808L | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Dual Universal Switched Capacitor Filter[MF10/MF10BJ/MF10BN/MF10BWP/MF10BWP-T/MF10CC/D/MF10CJ/MF10CN/MF10CWP/MF10CWP-T ] |
| MAX808LCPA | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX808LCPA+ | 功能描述:監(jiān)控電路 8-Pin uPower Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX808LCSA | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX808LCSA+ | 功能描述:監(jiān)控電路 8-Pin uPower Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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