參數(shù)資料
型號(hào): MAX780CEAG
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi): 電源管理
英文描述: Dual-Slot PCMCIA Analog Power Controller
中文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO24
封裝: 0.65 MM PITCH, PLASTIC, SSOP-24
文件頁(yè)數(shù): 6/12頁(yè)
文件大?。?/td> 134K
代理商: MAX780CEAG
M
Dual-S lot PCMCIA Analog Power Controller
6
_______________________________________________________________________________________
C1
0
0
0
0
1
1
1
1
AVPP1
0
0
1
1
0
0
1
1
AVPP0
0
1
0
1
0
1
0
1
AVPP
0V
VCCIN
VPPIN
High-Z
0V
0V
VCCIN
VPPIN
C1
0
0
0
0
1
1
1
1
BVPP1
0
0
1
1
0
0
1
1
BVPP0
0
1
0
1
0
1
0
1
BVPP
0V
VCCIN
VPPIN
High-Z
0V
0V
VCCIN
VPPIN
C1
0
0
0
0
1
1
1
1
AVCC1
0
0
1
1
0
0
1
1
AVCC0
0
1
0
1
0
1
0
1
ADRV3
0V
Hi-Z
0V
0V
0V
0V
0V
Hi-Z
ADRV5
0V
0V
Hi-Z
0V
0V
0V
Hi-Z
0V
C1
0
0
0
0
1
1
1
1
BVCC1
0
0
1
1
0
0
1
1
BVCC0
0
1
0
1
0
1
0
1
BDRV3
0V
Hi-Z
0V
0V
0V
0V
0V
Hi-Z
BDRV5
0V
0V
Hi-Z
0V
0V
0V
Hi-Z
0V
Table 1. AVPP Control Logic
Table 2. BVPP Control Logic
Table 3. ADRV3 and ADRV5 Control Logic
Table 4. BDRV3 and BDRV5 Control Logic
________________
Detailed Desc ription
V
PP
S witc hing
All four versions (A, B, C, and D) of the MAX780 allow
simple switching of PCMCIA card V
PP
to 0V, 5V, and
12V. On-chip power MOSFETs connect AVPP and
BVPP to either GND, VCCIN, or VPPIN. The AVPP0
and AVPP1 control logic inputs determine the state of
AVPP. Likewise, BVPP0 and BVPP1 control BVPP.
To prevent V
PP
overshoot due to parasitic inductance
in the +12V supply, the VPPIN bypass capacitor (C
IN
)
should be 10 times greater than the capacitance from
AVPP (C
A
) or BVPP (C
B
) to GND. Hence, when C
A
and C
B
are 0.1μF, C
IN
should be 1.0μF.
The
AGPI
and
BGPI
status outputs signal when the V
PP
lines are valid.
AGPI
goes low when AVPP exceeds
11.05V;
BGPI
goes low when BVPP exceeds 11.05V.
The status outputs and the reference are only active
when
SHDN
is high.
Pulling
SHDN
low puts the MAX780 into a low supply-
current mode and disables the reference and the
AGPI
and
BGPI
status outputs. The V
CC
level shifters
ADRV5, ADRV3, BDRV5, BDRV3 are all forced low
when
SHDN
is low. V
PP
switching is not affected by the
state of
SHDN
. Program AVPP and BVPP to 0V for low-
est power consumption when
SHDN
is low. Wait at
least 200μs after bringing the MAX780 out of shutdown
before checking
AGPI
or
BGPI
since the reference
needs time to stabilize.
V
CC
S witc hing
The MAX780 contains level shifters that simplify driving
external power MOSFETs to switch PCMCIA card V
CC
to 3.3V and 5V. While a PCMCIA card is being insert-
ed into the socket, the V
CC
pins on the card edge con-
nector should be powered down to 0V so that “hot
insertion” does not damage the PCMCIA card. The
simplest way to accomplish this is to pull out a
mechanical switch before the PCMCIA card is inserted.
The mechanical switch can be pushed in only when
the card has been fitted snugly into its socket. The
MAX780 Detailed Operating Circuit shows this method.
In the Detailed Operating Circuit, (with the mechanical
interlock switch closed) the PCMCIA card V
CC
cannot
be pulled more than a diode drop below 3.3V. The N-
channel power MOSFET that connects V
CC
to 3.3V has
its drain tied to V
CC
and its source tied to 3.3V, so that
its body diode prevents the card’s V
CC
from falling to
0V. If it were rotated so that the source connected to
V
CC
, then applying 5V to V
CC
would short the 5V sup-
ply to the 3.3V supply via the MOSFET’s body diode.
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