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參數(shù)資料
| 型號： | MAX747 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Parallel-Load 8-Bit Shift Registers 16-CFP -55 to 125 |
| 中文描述： | 高效率、PWM、降壓型控制器(外部P溝道驅(qū)動器) |
| 文件頁數(shù)： | 9/12頁 |
| 文件大小： | 136K |
| 代理商： | MAX747 |
M
High-Effic ienc y PWM, S tep-Down
P-Channel DC-DC Controller
_______________________________________________________________________________________
9
duty cycle) is 331mW. Metal film resistors are
recommended. Do not use wire-wound resistors because
their inductance will adversely affect circuit operation.
Determine the duty cycle for CCM from the following
equation:
where V
is the voltage drop across the external P-
FET and sense resistor, and can be approximated as
(I
LOAD
)[R
DS(ON)
+ R
SENSE
].
Induc tor S elec tion
Once the sense resistor value is determined, the
inductor is determined from the following equation. The
value of inductor L ensures proper slope
compensation. Continuing with the above example,
(R
(V
) (f
(38m ) (5V)
(50mV) (100kHz)
Although 38μH is the calculated value, the component
used may have a tolerance of ±30% or more. Make
sure the inductor’s saturation current rating (the current
at which the core begins to saturate and the
inductance starts to fall) exceeds the peak current set
by R
SENSE
.
Inductors with molypermalloy powder (MPP), Kool Mμ,
or ferrite are recommended. Inexpensive iron powder
core inductors are not suitable due to their increased
core losses. MPP and Kool Mμ cores have low
permeability, allowing larger currents.
For highest efficiency, use a coil with low DC
resistance. To minimize radiated noise, use a toroid,
pot core, or shielded coil.
External P-FET S elec tion
To ensure the external P-FET is fully on, use logic-level,
or low threshold P-FETs when the minimum input
voltage is less than 8V.
When selecting the P-FET, three important parameters
to note are total gate charge (Q
), on resistance
(R
DS(ON)
), and reverse transfer capacitance (C
RSS
).
Q
, the total gate charge, includes all capacitances
associated with charging the gate. Use the typical Q
g
value for best results; the maximum value is usually
overspecified since it is a guaranteed limit and not the
measured value. The typical total gate charge should
be
≤
50nC. Larger numbers mean that EXT may not be
able to adequately drive the gate. EXT sink/source
capability (I
EXT
) is typically 140mA.
There are two losses associated with the P-FET’s power
dissipation: I
2
R losses and switching losses. CCM
power dissipation (PD) is approximated by:
=
where the duty cycle is approximated by V
/V+, f
=
100kHz, and R
and C
are given in the data
sheet of the chosen P-FET. In the equation, R
is
assumed to be constant, but is actually a function of
temperature. Note that the equation does not account
for losses incurred by charging and discharging the
PD
Duty Cycle I
R
+
]
V +
C
I
) (
f
) (
I
PK
DS(ON)
2
RSS
PK
OSC
EXT
)
[
(
)
2
L
) (V
)
)
38 H
SENSE
OUT(MAX)
RAMP(MAX)
OSC
=
=
=
Duty cycle (%)
V
V
V
V
V
100%
OUT
DIODE
+
SW
DIODE
=
+
+
)
GND
13
MAX747
V+
FB
12
5
V
IN
...to V
OUT
R4 = 10k
TO1M
OUT
8
R5
R4
C6
*
R5 = R4 V
OUT
2V
*
SEE COMPENSATIONCAPACITORSECTION
N.C.
GND
13
MAX747
V+
LBO
12
14
…
TOV
OUT
OR V
IN
V
TH
= 2.0V
R3
100k
R
2
= R1 V
TRIP
1
R2
R1
LOW-BATTERY
OUTPUT
V
IN
LBI
Figure 4. Input Voltage Monitor Circuit
Figure 5. Adjustable Output Circuit
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| MAX747EPD | Parallel-Load 8-Bit Shift Registers 16-CDIP -55 to 125 |
| MAX747ESD | Parallel-Load 8-Bit Shift Registers 16-CFP -55 to 125 |
| MAX747MJD | Parallel-Load 8-Bit Shift Registers 16-CDIP -55 to 125 |
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| MAX7472UTI+ | 制造商:Maxim Integrated Products 功能描述: |
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