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參數(shù)資料
| 型號： | MAX7388CVRD |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | 3 X 3 MM, MO-187CAA, MICRO, SOP-8 |
| 文件頁數(shù)： | 12/14頁 |
| 文件大?。?/td> | 680K |
| 代理商： | MAX7388CVRD |
5
4
3
2
1
CLK
tRST
VTH+
VITH
VTH-
VCCR
VITH - VIHYST
RST
PFO
CLOCK STARTS ON INTERNAL
POR (VTH+, VCC RISING)
RST RELEASES AFTER THE
RESET TIMEOUT PERIOD
V
CC
(V)
PFO ASSERTS AS VCC DROPS
BELOW VITH - VIHYST
RST CONTINUES TO
ASSERT UNTIL VCCR
RST ASSERTS ON RESET FALLING
VOLTAGE (VTH-, VCC FALLING);
CLOCK STOPS
Figure 1. RST/RST and PFO Behavior During Power-Up and Brownout
MAX7387/MAX7388
System Monitoring Oscillator with
Watchdog and Power Fail
_______________________________________________________________________________________
7
Clock Output (CLOCK)
The push-pull clock output (CLOCK) drives a ground-
connected 1k
load or a positive supply connected
500
load to within 300mV of either supply rail. CLOCK
remains stable over the full operating voltage range and
does not generate short output cycles during either
power-on or power-off. A typical startup characteristic is
shown in the Typical Operating Characteristics section.
Reset
The reset function drives the microcontroller reset input
to prevent operation in the cases of the initial power-on
setting, low power-supply voltages, and the failed
watchdog operations. Three reset output versions are
available: push-pull RST, push-pull RST, and open-drain
RST. The reset timeout period (tRST) is nominally 135s.
Power-On Reset (POR)
The internal power-on reset (POR) circuit detects the
power-supply voltage (VCC) level at startup. The POR
circuit starts the oscillator when VCC exceeds the reset
rising threshold level (VTH+). The reset output remains
asserted from the time VCC crosses the VTH+ and con-
tinues to be asserted for the reset timeout period (tRST).
Upon completion of the reset timeout, the reset output
is released. See Figure 1.
Low-Voltage Lockout
The reset output asserts whenever VCC drops below the
reset falling threshold, VTH-. The difference between the
reset rising and falling threshold values is VTH+ - (VTH-).
The nominal hysteresis value is 2% of the reset rising
threshold value. The reset detection circuitry provides
filtering to prevent triggering on negative voltage
spikes. See the Maximum VCC Transient Duration vs.
Reset Threshold Overdrive typical operating circuit.
Figure 1 shows the reset output (RST/RST) behavior
during power-up and brownout.
Watchdog
The watchdog function provides microprocessor moni-
toring by requiring the microprocessor to toggle an out-
put pin to indicate correct operation. The WDI input
monitors the port signal and resets the watchdog timer
on receipt of a rising edge. If an edge is not received
within the required watchdog timeout period, the watch-
dog circuit initiates a reset cycle. The internal watchdog
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| MAX7388SRFF | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:System Monitoring Oscillator with Watchdog and Power Fail |
| MAX7389 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Speed-Switching Clock Generator with Power Fail |
| MAX7389_06 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Microcontroller Clock Generator with Watchdog |
| MAX7389CMAC | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MAX7389CMQT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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