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參數(shù)資料
| 型號： | MAX7359ETG+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC KEY SWITCH 2WIRE 24-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 86 |
| 應(yīng)用： | 移動電話，PDA，播放器 |
| 接口： | I²C |
| 電源電壓： | 1.65 V ~ 3.6 V |
| 封裝/外殼： | 24-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-TQFN-EP（3.5x3.5） |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
MAX7359
2-Wire Interfaced Low-EMI
Key Switch Controller/GPO
______________________________________________________________________________________
15
MAX7359
Acknowledge
The acknowledge bit is a clocked 9th bit (Figure 4),
which the recipient uses to handshake receipt of each
byte of data. Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, so the SDA line is stable low
during the high period of the clock pulse. When the
master is transmitting to the MAX7359, the MAX7359
generates the acknowledge bit because the MAX7359
is the recipient. When the MAX7359 is transmitting to
the master, the master generates the acknowledge bit
because the master is the recipient.
Slave Addresses
The MAX7359 has a 7-bit long slave address (Figure 5).
The bit following a 7-bit slave address is the R/W bit,
which is low for a write command and high for a read
command.
The first 4 bits (MSBs) of the MAX7359 slave address
are always 0111. Slave address bits A3, A2, and A1
correspond, by the matrix in Table 10, to the states of
the device address input AD0, and A0 corresponds to
the R/W bit. The AD0 input can be connected to any of
four signals: GND, VCC, SDA, or SCL, giving four possi-
ble slave address pairs, allowing up to four MAX7359
devices to share the bus. Because SDA and SCL are
dynamic signals, care must be taken to ensure that AD0
transitions no sooner than the signals on the SDA and
SCL pins.
The MAX7359 monitors the bus continuously, waiting for
a START condition followed by its slave address. When
the MAX7359 recognizes its slave address, it acknowl-
edges and is then ready for continued communication.
Bus Timeout
The MAX7359 features a 20ms minimum bus timeout on
the 2-wire serial interface, largely to prevent the
MAX7359 from holding the SDA I/O low during a read
transaction if the SCL hangs for any reason before a seri-
al transaction has been completed. Bus timeout operates
by causing the MAX7359 to internally terminate a serial
transaction, either read or write, if SCL low exceeds
20ms. After a bus timeout, the MAX7359 waits for a valid
START condition before responding to a consecutive
transmission. This feature can be enabled or disabled
under user control by writing to the configuration register
(Table 4).
DEVICE ADDRESS
PIN AD0
A7
A6
A5
A4
A3
A2
A1
A0
GND
0
1110
00
R/W
VCC
0
1110
10
R/W
SDA
0
1111
00
R/W
SCL
0
1111
10
R/W
Table 10. 2-Wire Interface Address Map
SDA
SCL
01
1
A3
A2
A1
1
MSB
LSB
ACK
R/W
Figure 5. Slave Address
SCL
SDA
BY
TRANSMITTER
CLOCK PULSE FOR
ACKNOWLEDGE
START
CONDITION
SDA
BY
RECEIVER
1
2
8
9
S
Figure 4. Acknowledge
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參數(shù)描述 |
|---|---|
| MAX7359ETG+ | 功能描述:外圍驅(qū)動器與原件 - PCI Low-EMI Key Switch Controller/GPIO RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX7359ETG+G47 | 功能描述:外圍驅(qū)動器與原件 - PCI 2-Wire Interfaced Low-EMI Switch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX7359ETG+T | 功能描述:外圍驅(qū)動器與原件 - PCI Low-EMI Key Switch Controller/GPIO RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX7359ETG+TG47 | 功能描述:外圍驅(qū)動器與原件 - PCI 2-Wire Interfaced Low-EMI Key Switch Controller/GPO RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX7359EVKIT+ | 功能描述:外圍驅(qū)動器與原件 - PCI MAX7359 Eval Kit RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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