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參數(shù)資料
| 型號： | MAX733CWE |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Current-Mode SMPS Controller |
| 中文描述： | 1.5 A SWITCHING REGULATOR, 170 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | SO-16 |
| 文件頁數(shù)： | 6/17頁 |
| 文件大小： | 338K |
| 代理商： | MAX733CWE |
M
Serial Interface
Serial Addressing
The MAX7310 operates as a slave that sends and
receives data through a 2-wire interface. The interface
uses a serial data line (SDA) and a serial clock line
(SCL) to achieve bidirectional communication between
master(s) and slave(s). A master, typically a microcon-
troller, initiates all data transfers to and from the
MAX7310, and generates the SCL clock that synchro-
nizes the data transfer (Figure 2).
Each transmission consists of a start condition sent by
a master, followed by the MAX7310 7-bit slave address
plus an R/
W
bit, a register address byte, one or more
data bytes, and finally a stop condition (Figure 3).
Start and Stop Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a start (S) condition by transitioning SDA from
high to low while SCL is high. When the master has fin-
ished communicating with the slave, it issues a stop (P)
condition by transitioning SDA from low to high while
SCL is high. The bus is then free for another transmis-
sion (Figure 3).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
Acknowledge
The acknowledge bit is a clocked 9th bit, which the
recipient uses as a handshake receipt of each byte of
data (Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is sta-
ble low during the high period of the clock pulse. When
the master is transmitting to the MAX7310, the
MAX7310 generates the acknowledge bit since the
MAX7310 is the recipient. When the MAX7310 is trans-
mitting to the master, the master generates the
acknowledge bit.
Slave Address
The MAX7310 has a 7-bit-long slave address (Figure
6). The 8th bit following the 7-bit slave address is the
R/
W
bit. Set this bit low for a write command and high
for a read command.
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
6
_______________________________________________________________________________________
Figure 2. 2-Wire Serial Interface Timing Diagrams
SCL
SDA
START CONDITION
STOP CONDITION
REPEATED START CONDITION
START CONDITION
t
SU, DAT
t
HD, DAT
t
LOW
t
HD, STA
t
HIGH
t
R
t
F
t
SU, STA
t
HD, STA
t
SU, STO
t
BUF
Figure 3. Start and Stop Conditions
SDA
SCL
S
START
CONDITION
P
STOP
CONDITION
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX733CWE+ | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| MAX733CWE+T | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| MAX733CWE-T | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| MAX733EPA | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| MAX733EPA+ | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
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