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參數(shù)資料
| 型號： | MAX732CWE |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Current-Mode SMPS Controller |
| 中文描述： | 1.5 A SWITCHING REGULATOR, 170 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | SO-16 |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 338K |
| 代理商： | MAX732CWE |
M
the configuration register. Writes to the input port regis-
ter are ignored.
The output port register sets the outgoing logic levels of
the I/O ports, defined as outputs by the configuration
register. Reads from the output port register reflect the
value that is in the flip-flop controlling the output selec-
tion, not the actual I/O value, which may differ if the out-
put is overloaded.
The polarity inversion register enables polarity inversion
of ports defined as inputs by the configuration register.
Set the bit in the polarity inversion register (write with a
1) to invert the corresponding port pin
’
s polarity. Clear
the bit in the polarity inversion register (write with a
zero) to retain the corresponding port pin
’
s original
polarity.
The configuration register configures the directions of
the ports. Set the bit in the configuration register to
enable the corresponding port pin as an input with a
high-impedance output driver. Clear the bit in the con-
figuration register to enable the corresponding port pin
as an output.
Set bit T0 to enable the bus timeout function and low to
disable the bus timeout function. Enabling the timeout
feature resets the serial bus interface when SCL stops
either high or low during a read or write access to the
MAX7310. If either SCL or SDA is low for more than
30ms min and 60ms max after the start of a valid serial
transfer, the interface resets itself. Resetting the serial
bus interface sets up SDA as an input. The MAX7310
then waits for another start condition.
Standby
The MAX7310 goes into standby when all pins are set
to V+ or GND. Standby supply current is typically
1.7μA.
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
8
_______________________________________________________________________________________
Table 3. Register 1—Output Port Register
BIT
Default
O7
0
O6
0
O5
0
O4
0
O3
0
O2
0
O1
0
O0
0
Table 4. Register 2
—
Polarity Inversion Register
BIT
Default
I/O7
1
I/O6
1
I/O5
1
I/O4
1
I/O3
0
I/O2
0
I/O1
0
I/O0
0
Table 5. Register 3
—
Configuration Register
BIT
Default
I/O7
1
I/O6
1
I/O5
1
I/O4
1
I/O3
1
I/O2
1
I/O1
1
I/O0
1
Table 6. Register 4
—
Timeout Register
BIT
Default
T7
x
T6
x
T5
x
T4
x
T3
x
T2
x
T1
x
T0
1
Table 1. Register Address
REGISTER
ADDRESS
(hex)
FUNCTION
PROTOCOL
0x00
0x01
Input port register
Output port register
Read byte.
Read/write byte.
0x02
Polarity inversion
register
Read/write byte.
0x03
Configuration
register
Read/write byte.
0x04
Timeout register
Read/write byte.
0xFF
Reserved register
Factory reserved.
Do not write to this
register.
Table 2. Register 0
—
Input Port Register
BIT
I7
I6
I5
I4
I3
I2
I1
I0
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